From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF48EC4338F for ; Fri, 13 Aug 2021 15:09:00 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ACF696109E for ; Fri, 13 Aug 2021 15:09:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org ACF696109E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DC976E84E; Fri, 13 Aug 2021 15:09:00 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4B0176E84E for ; Fri, 13 Aug 2021 15:08:58 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10075"; a="202733284" X-IronPort-AV: E=Sophos;i="5.84,319,1620716400"; d="scan'208";a="202733284" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Aug 2021 08:08:57 -0700 X-IronPort-AV: E=Sophos;i="5.84,319,1620716400"; d="scan'208";a="518189294" Received: from cgearing-mobl.ger.corp.intel.com (HELO localhost) ([10.251.209.226]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Aug 2021 08:08:55 -0700 From: Jani Nikula To: Rodrigo Vivi Cc: intel-gfx@lists.freedesktop.org, Manasi Navare In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210813115610.20010-1-jani.nikula@intel.com> Date: Fri, 13 Aug 2021 18:08:52 +0300 Message-ID: <87o8a1l6uz.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Intel-gfx] [PATCH] drm/i915/mst: use intel_de_rmw() to simplify VC payload alloc set/clear X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, 13 Aug 2021, Rodrigo Vivi wrote: > On Fri, Aug 13, 2021 at 02:56:10PM +0300, Jani Nikula wrote: >> Less is more, fewer lines to wonder about. >> >> Cc: Manasi Navare >> Signed-off-by: Jani Nikula > > Reviewed-by: Rodrigo Vivi Thanks! > although sometimes I get myself wondering we might get in some > case where our check inside the rmw function, to avoid writing the > same value, could cause some situation where we should perform > the write operation regardless. Me too. I could be persuaded to change the rmw function to not optimize the write away. BR, Jani. > >> --- >> drivers/gpu/drm/i915/display/intel_dp_mst.c | 9 ++------- >> 1 file changed, 2 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c >> index 8d13d7b26a25..9859c0334ebc 100644 >> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c >> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c >> @@ -396,7 +396,6 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, >> to_intel_connector(old_conn_state->connector); >> struct drm_i915_private *dev_priv = to_i915(connector->base.dev); >> bool last_mst_stream; >> - u32 val; >> >> intel_dp->active_mst_links--; >> last_mst_stream = intel_dp->active_mst_links == 0; >> @@ -412,12 +411,8 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, >> >> clear_act_sent(encoder, old_crtc_state); >> >> - val = intel_de_read(dev_priv, >> - TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder)); >> - val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC; >> - intel_de_write(dev_priv, >> - TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), >> - val); >> + intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), >> + TRANS_DDI_DP_VC_PAYLOAD_ALLOC, 0); >> >> wait_for_act_sent(encoder, old_crtc_state); >> >> -- >> 2.20.1 >> -- Jani Nikula, Intel Open Source Graphics Center