From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Axtens Date: Fri, 19 Feb 2021 05:18:19 +0000 Subject: Re: [RFC PATCH 1/9] KVM: PPC: Book3S 64: move KVM interrupt entry to a common entry point Message-Id: <87o8ggab50.fsf@linkitivity.dja.id.au> List-Id: References: <20210202030313.3509446-1-npiggin@gmail.com> <20210202030313.3509446-2-npiggin@gmail.com> In-Reply-To: <20210202030313.3509446-2-npiggin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Nicholas Piggin , kvm-ppc@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin Hi Nick, > +++ b/arch/powerpc/kvm/book3s_64_entry.S > @@ -0,0 +1,34 @@ > +#include > +#include > +#include > +#include > +#include > +#include > + > +/* > + * We come here from the first-level interrupt handlers. > + */ > +.global kvmppc_interrupt > +.balign IFETCH_ALIGN_BYTES > +kvmppc_interrupt: > + /* > + * Register contents: Clearly r9 contains some data at this point, and I think it's guest r9 because of what you say later on in book3s_hv_rmhandlers.S::kvmppc_interrupt_hv. Is that right? Should that be documented in this comment as well? > + * R12 = (guest CR << 32) | interrupt vector > + * R13 = PACA > + * guest R12 saved in shadow VCPU SCRATCH0 > + * guest R13 saved in SPRN_SCRATCH0 > + */ > +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE > + std r9, HSTATE_SCRATCH2(r13) > + lbz r9, HSTATE_IN_GUEST(r13) > + cmpwi r9, KVM_GUEST_MODE_HOST_HV > + beq kvmppc_bad_host_intr > +#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE > + cmpwi r9, KVM_GUEST_MODE_GUEST > + ld r9, HSTATE_SCRATCH2(r13) > + beq kvmppc_interrupt_pr > +#endif > + b kvmppc_interrupt_hv > +#else > + b kvmppc_interrupt_pr > +#endif Apart from that I had a look and convinced myself that the code will behave the same as before. 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[2001:44b8:1113:6700:7ad2:5bb3:4fd4:d737]) by smtp.gmail.com with ESMTPSA id o9sm8081438pfp.21.2021.02.18.21.18.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Feb 2021 21:18:22 -0800 (PST) From: Daniel Axtens To: Nicholas Piggin , kvm-ppc@vger.kernel.org Subject: Re: [RFC PATCH 1/9] KVM: PPC: Book3S 64: move KVM interrupt entry to a common entry point In-Reply-To: <20210202030313.3509446-2-npiggin@gmail.com> References: <20210202030313.3509446-1-npiggin@gmail.com> <20210202030313.3509446-2-npiggin@gmail.com> Date: Fri, 19 Feb 2021 16:18:19 +1100 Message-ID: <87o8ggab50.fsf@linkitivity.dja.id.au> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org, Nicholas Piggin Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Hi Nick, > +++ b/arch/powerpc/kvm/book3s_64_entry.S > @@ -0,0 +1,34 @@ > +#include > +#include > +#include > +#include > +#include > +#include > + > +/* > + * We come here from the first-level interrupt handlers. > + */ > +.global kvmppc_interrupt > +.balign IFETCH_ALIGN_BYTES > +kvmppc_interrupt: > + /* > + * Register contents: Clearly r9 contains some data at this point, and I think it's guest r9 because of what you say later on in book3s_hv_rmhandlers.S::kvmppc_interrupt_hv. Is that right? Should that be documented in this comment as well? > + * R12 = (guest CR << 32) | interrupt vector > + * R13 = PACA > + * guest R12 saved in shadow VCPU SCRATCH0 > + * guest R13 saved in SPRN_SCRATCH0 > + */ > +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE > + std r9, HSTATE_SCRATCH2(r13) > + lbz r9, HSTATE_IN_GUEST(r13) > + cmpwi r9, KVM_GUEST_MODE_HOST_HV > + beq kvmppc_bad_host_intr > +#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE > + cmpwi r9, KVM_GUEST_MODE_GUEST > + ld r9, HSTATE_SCRATCH2(r13) > + beq kvmppc_interrupt_pr > +#endif > + b kvmppc_interrupt_hv > +#else > + b kvmppc_interrupt_pr > +#endif Apart from that I had a look and convinced myself that the code will behave the same as before. On that basis: Reviewed-by: Daniel Axtens Kind regards, Daniel