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From: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
To: qemu-arm@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>
Subject: Re: Aarch64-qemu
In-reply-to: <CAA8B=UQN_cYkij5eYwhbefF0om08R+BO2Zvj0bT3Kex_Sx79ww@mail.gmail.com>
Date: Wed, 06 Nov 2019 14:16:25 +0000
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Wissem Yahiaoui <wissem.yahiaouii@gmail.com> writes:

> Hi Peter & Qemu Team,
>
>
> Actually, I also tried it after you send me the documentation. but it will
> be also an segmentation fault. Here, it a screenshot on how I did use
> it.

Please just use inline text. Screenshots for text output or test cases
is just a pain to copy/transcribe.

>
>
> Thanks,
>
> On Wed, 6 Nov 2019 at 12:55, Peter Maydell <peter.maydell@linaro.org> wro=
te:
>
>> On Wed, 6 Nov 2019 at 11:44, Wissem Yahiaoui <wissem.yahiaouii@gmail.com>
>> wrote:
>> >
>> > Hi Qemu team,
>> >
>> > As I sent you in the first email, that the SVE specific registers in
>> aarch64-qemu results an core dumped/segmentation fault. I Tried the
>> ZCR_EL1, ZCR_EL2 and ZCR_EL12, it compiles fine with the gnu toolchain, =
but
>> it doesn't run in qemu. I need to simulate the length check at run-time,=
 I
>> am using Qemu but apparently I am missing some step/s.
>>
>> You need to use the prctl() that I suggested, you cannot directly
>> access any of those registers from userspace. If you have a
>> simple test program which tries to use the prctl() but does not
>> work then I can have a look at what is going wrong.
>>
>> thanks
>> -- PMM
>>


--
Alex Benn=C3=A9e