From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Date: Thu, 14 Jun 2018 15:25:38 +0300 Message-ID: <87o9gdzha5.fsf@intel.com> References: <20180613160553.11664-1-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id B9E0D6E06A for ; Thu, 14 Jun 2018 12:25:46 +0000 (UTC) In-Reply-To: <20180613160553.11664-1-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ville Syrjala , intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org T24gV2VkLCAxMyBKdW4gMjAxOCwgVmlsbGUgU3lyamFsYSA8dmlsbGUuc3lyamFsYUBsaW51eC5p bnRlbC5jb20+IHdyb3RlOgo+IEZyb206IFZpbGxlIFN5cmrDpGzDpCA8dmlsbGUuc3lyamFsYUBs aW51eC5pbnRlbC5jb20+Cj4KPiBMb29rcyBsaWtlIGludGVybGFjZWQgRFAgb3V0cHV0IGRvZXNu J3Qgd29yayBvbiBnNHggZWl0aGVyLiBOb3QgYWxsCj4gdGhhdCBzdXJwcmlzaW5nIGNvbnNpZGVy aW5nIHdlIGFscmVhZHkgZXN0YWJsaXNoZWQgdGhhdCBpbnRlcmxhY2VkCj4gRFAgb3V0cHV0IGlz IGJ1c3RlZCBvbiBWTFYvQ0hWLgo+Cj4gQ2M6IHN0YWJsZUB2Z2VyLmtlcm5lbC5vcmcKPiBTaWdu ZWQtb2ZmLWJ5OiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxlLnN5cmphbGFAbGludXguaW50ZWwuY29t PgoKUmV2aWV3ZWQtYnk6IEphbmkgTmlrdWxhIDxqYW5pLm5pa3VsYUBpbnRlbC5jb20+CgoKPiAt LS0KPiAgZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYyB8IDQgKystLQo+ICAxIGZpbGUg Y2hhbmdlZCwgMiBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQo+Cj4gZGlmZiAtLWdpdCBh L2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2RwLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9p bnRlbF9kcC5jCj4gaW5kZXggNDBmZmQ5MTYzMTc1Li42MDY4OTg2ZmQ5ODUgMTAwNjQ0Cj4gLS0t IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYwo+ICsrKyBiL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2ludGVsX2RwLmMKPiBAQCAtMTg2OSw3ICsxODY5LDcgQEAgaW50ZWxfZHBfY29tcHV0 ZV9jb25maWcoc3RydWN0IGludGVsX2VuY29kZXIgKmVuY29kZXIsCj4gIAkJCQkJCWNvbm5fc3Rh dGUtPnNjYWxpbmdfbW9kZSk7Cj4gIAl9Cj4gIAo+IC0JaWYgKChJU19WQUxMRVlWSUVXKGRldl9w cml2KSB8fCBJU19DSEVSUllWSUVXKGRldl9wcml2KSkgJiYKPiArCWlmIChIQVNfR01DSF9ESVNQ TEFZKGRldl9wcml2KSAmJgo+ICAJICAgIGFkanVzdGVkX21vZGUtPmZsYWdzICYgRFJNX01PREVf RkxBR19JTlRFUkxBQ0UpCj4gIAkJcmV0dXJuIGZhbHNlOwo+ICAKPiBAQCAtNjM1MSw3ICs2MzUx LDcgQEAgaW50ZWxfZHBfaW5pdF9jb25uZWN0b3Ioc3RydWN0IGludGVsX2RpZ2l0YWxfcG9ydCAq aW50ZWxfZGlnX3BvcnQsCj4gIAlkcm1fY29ubmVjdG9yX2luaXQoZGV2LCBjb25uZWN0b3IsICZp bnRlbF9kcF9jb25uZWN0b3JfZnVuY3MsIHR5cGUpOwo+ICAJZHJtX2Nvbm5lY3Rvcl9oZWxwZXJf YWRkKGNvbm5lY3RvciwgJmludGVsX2RwX2Nvbm5lY3Rvcl9oZWxwZXJfZnVuY3MpOwo+ICAKPiAt CWlmICghSVNfVkFMTEVZVklFVyhkZXZfcHJpdikgJiYgIUlTX0NIRVJSWVZJRVcoZGV2X3ByaXYp KQo+ICsJaWYgKCFIQVNfR01DSF9ESVNQTEFZKGRldl9wcml2KSkKPiAgCQljb25uZWN0b3ItPmlu dGVybGFjZV9hbGxvd2VkID0gdHJ1ZTsKPiAgCWNvbm5lY3Rvci0+ZG91Ymxlc2Nhbl9hbGxvd2Vk ID0gMDsKCi0tIApKYW5pIE5pa3VsYSwgSW50ZWwgT3BlbiBTb3VyY2UgR3JhcGhpY3MgQ2VudGVy Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdm eCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xp c3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com ([134.134.136.65]:31117 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752929AbeFNMZz (ORCPT ); Thu, 14 Jun 2018 08:25:55 -0400 From: Jani Nikula To: Ville Syrjala , intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs In-Reply-To: <20180613160553.11664-1-ville.syrjala@linux.intel.com> References: <20180613160553.11664-1-ville.syrjala@linux.intel.com> Date: Thu, 14 Jun 2018 15:25:38 +0300 Message-ID: <87o9gdzha5.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: stable-owner@vger.kernel.org List-ID: On Wed, 13 Jun 2018, Ville Syrjala wrote: > From: Ville Syrjälä > > Looks like interlaced DP output doesn't work on g4x either. Not all > that surprising considering we already established that interlaced > DP output is busted on VLV/CHV. > > Cc: stable@vger.kernel.org > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 40ffd9163175..6068986fd985 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > conn_state->scaling_mode); > } > > - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > + if (HAS_GMCH_DISPLAY(dev_priv) && > adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > return false; > > @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); > drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); > > - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) > + if (!HAS_GMCH_DISPLAY(dev_priv)) > connector->interlace_allowed = true; > connector->doublescan_allowed = 0; -- Jani Nikula, Intel Open Source Graphics Center