* [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
Update the Device Tree binding documentation for the Marvell EBU UART,
in order to allow describing the extended UART IP block, in addition to
the already supported standard UART IP. This requires adding a new
compatible string, the introduction of a clocks property, and extensions
to the interrupts property.
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
.../devicetree/bindings/serial/mvebu-uart.txt | 49 +++++++++++++++++++---
1 file changed, 44 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
index d37fabe17bd1..3df3a3fab4bb 100644
--- a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
@@ -1,13 +1,52 @@
-* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
+* Marvell UART : Non standard UART used in some of Marvell EBU SoCs
+ e.g., Armada-3700.
Required properties:
-- compatible: "marvell,armada-3700-uart"
+- compatible:
+ - "marvell,armada-3700-uart" for the standard variant of the UART
+ (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
+ FIFO, baudrate limited to 230400).
+ - "marvell,armada-3700-uart-ext" for the extended variant of the
+ UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
+ accesses to the FIFO, baudrate unlimited by the dividers).
- reg: offset and length of the register set for the device.
-- interrupts: device interrupt
+- clocks: UART reference clock used to derive the baudrate (only
+ mandatory with "marvell,armada-3700-uart-ext" compatible).
+- interrupts:
+ - Must contain three elements for the standard variant of the IP
+ (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
+ respectively the UART sum interrupt, the UART TX interrupt and
+ UART RX interrupt. A corresponding interrupt-names property must
+ be defined.
+ - Must contain two elements for the extended variant of the IP
+ (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
+ respectively the UART TX interrupt and the UART RX interrupt. A
+ corresponding interrupts-names property must be defined.
+ - For backward compatibility reasons, a single element interrupts
+ property is also supported for the standard variant of the IP,
+ containing only the UART sum interrupt. This form is deprecated
+ and should no longer be used.
Example:
- serial@12000 {
+ uart0: serial@12000 {
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x200>;
- interrupts = <43>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uart-sum", "uart-tx", "uart-rx";
+ status = "disabled";
+ };
+
+ uart1: serial@12200 {
+ compatible = "marvell,armada-3700-uart-ext";
+ reg = <0x12200 0x30>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uart-tx", "uart-rx";
+ status = "disabled";
};
--
2.11.0
--
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^ permalink raw reply related [flat|nested] 58+ messages in thread* [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
Update the Device Tree binding documentation for the Marvell EBU UART,
in order to allow describing the extended UART IP block, in addition to
the already supported standard UART IP. This requires adding a new
compatible string, the introduction of a clocks property, and extensions
to the interrupts property.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
.../devicetree/bindings/serial/mvebu-uart.txt | 49 +++++++++++++++++++---
1 file changed, 44 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
index d37fabe17bd1..3df3a3fab4bb 100644
--- a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
@@ -1,13 +1,52 @@
-* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
+* Marvell UART : Non standard UART used in some of Marvell EBU SoCs
+ e.g., Armada-3700.
Required properties:
-- compatible: "marvell,armada-3700-uart"
+- compatible:
+ - "marvell,armada-3700-uart" for the standard variant of the UART
+ (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
+ FIFO, baudrate limited to 230400).
+ - "marvell,armada-3700-uart-ext" for the extended variant of the
+ UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
+ accesses to the FIFO, baudrate unlimited by the dividers).
- reg: offset and length of the register set for the device.
-- interrupts: device interrupt
+- clocks: UART reference clock used to derive the baudrate (only
+ mandatory with "marvell,armada-3700-uart-ext" compatible).
+- interrupts:
+ - Must contain three elements for the standard variant of the IP
+ (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
+ respectively the UART sum interrupt, the UART TX interrupt and
+ UART RX interrupt. A corresponding interrupt-names property must
+ be defined.
+ - Must contain two elements for the extended variant of the IP
+ (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
+ respectively the UART TX interrupt and the UART RX interrupt. A
+ corresponding interrupts-names property must be defined.
+ - For backward compatibility reasons, a single element interrupts
+ property is also supported for the standard variant of the IP,
+ containing only the UART sum interrupt. This form is deprecated
+ and should no longer be used.
Example:
- serial at 12000 {
+ uart0: serial at 12000 {
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x200>;
- interrupts = <43>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uart-sum", "uart-tx", "uart-rx";
+ status = "disabled";
+ };
+
+ uart1: serial at 12200 {
+ compatible = "marvell,armada-3700-uart-ext";
+ reg = <0x12200 0x30>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uart-tx", "uart-rx";
+ status = "disabled";
};
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread* Re: [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-17 22:00 ` Rob Herring
-1 siblings, 0 replies; 58+ messages in thread
From: Rob Herring @ 2017-10-17 22:00 UTC (permalink / raw)
To: Miquel Raynal
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon, linux-serial, devicetree,
linux-arm-kernel, linux-gpio, Thomas Petazzoni, Antoine Tenart,
Nadav Haklai, Wilson Ding
On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> Update the Device Tree binding documentation for the Marvell EBU UART,
> in order to allow describing the extended UART IP block, in addition to
> the already supported standard UART IP. This requires adding a new
> compatible string, the introduction of a clocks property, and extensions
> to the interrupts property.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> .../devicetree/bindings/serial/mvebu-uart.txt | 49 +++++++++++++++++++---
> 1 file changed, 44 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> index d37fabe17bd1..3df3a3fab4bb 100644
> --- a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> +++ b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> @@ -1,13 +1,52 @@
> -* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs
> + e.g., Armada-3700.
>
> Required properties:
> -- compatible: "marvell,armada-3700-uart"
> +- compatible:
> + - "marvell,armada-3700-uart" for the standard variant of the UART
> + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
> + FIFO, baudrate limited to 230400).
> + - "marvell,armada-3700-uart-ext" for the extended variant of the
> + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
> + accesses to the FIFO, baudrate unlimited by the dividers).
What do you call the next extended version? marvell,armada-3700-uart-ext-ext?
This is different versions of UART on the same chip?
> - reg: offset and length of the register set for the device.
> -- interrupts: device interrupt
> +- clocks: UART reference clock used to derive the baudrate (only
> + mandatory with "marvell,armada-3700-uart-ext" compatible).
How is this optional? The freq is fixed if not present? If so, what
frequency?
> +- interrupts:
> + - Must contain three elements for the standard variant of the IP
> + (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
> + respectively the UART sum interrupt, the UART TX interrupt and
> + UART RX interrupt. A corresponding interrupt-names property must
> + be defined.
> + - Must contain two elements for the extended variant of the IP
> + (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
> + respectively the UART TX interrupt and the UART RX interrupt. A
> + corresponding interrupts-names property must be defined.
> + - For backward compatibility reasons, a single element interrupts
> + property is also supported for the standard variant of the IP,
> + containing only the UART sum interrupt. This form is deprecated
> + and should no longer be used.
>
> Example:
> - serial@12000 {
> + uart0: serial@12000 {
> compatible = "marvell,armada-3700-uart";
> reg = <0x12000 0x200>;
> - interrupts = <43>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> + status = "disabled";
Don't show status in examples.
> + };
> +
> + uart1: serial@12200 {
> + compatible = "marvell,armada-3700-uart-ext";
> + reg = <0x12200 0x30>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "uart-tx", "uart-rx";
> + status = "disabled";
> };
> --
> 2.11.0
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
@ 2017-10-17 22:00 ` Rob Herring
0 siblings, 0 replies; 58+ messages in thread
From: Rob Herring @ 2017-10-17 22:00 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> Update the Device Tree binding documentation for the Marvell EBU UART,
> in order to allow describing the extended UART IP block, in addition to
> the already supported standard UART IP. This requires adding a new
> compatible string, the introduction of a clocks property, and extensions
> to the interrupts property.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> .../devicetree/bindings/serial/mvebu-uart.txt | 49 +++++++++++++++++++---
> 1 file changed, 44 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> index d37fabe17bd1..3df3a3fab4bb 100644
> --- a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> +++ b/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> @@ -1,13 +1,52 @@
> -* Marvell UART : Non standard UART used in some of Marvell EBU SoCs (e.g., Armada-3700)
> +* Marvell UART : Non standard UART used in some of Marvell EBU SoCs
> + e.g., Armada-3700.
>
> Required properties:
> -- compatible: "marvell,armada-3700-uart"
> +- compatible:
> + - "marvell,armada-3700-uart" for the standard variant of the UART
> + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
> + FIFO, baudrate limited to 230400).
> + - "marvell,armada-3700-uart-ext" for the extended variant of the
> + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
> + accesses to the FIFO, baudrate unlimited by the dividers).
What do you call the next extended version? marvell,armada-3700-uart-ext-ext?
This is different versions of UART on the same chip?
> - reg: offset and length of the register set for the device.
> -- interrupts: device interrupt
> +- clocks: UART reference clock used to derive the baudrate (only
> + mandatory with "marvell,armada-3700-uart-ext" compatible).
How is this optional? The freq is fixed if not present? If so, what
frequency?
> +- interrupts:
> + - Must contain three elements for the standard variant of the IP
> + (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
> + respectively the UART sum interrupt, the UART TX interrupt and
> + UART RX interrupt. A corresponding interrupt-names property must
> + be defined.
> + - Must contain two elements for the extended variant of the IP
> + (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
> + respectively the UART TX interrupt and the UART RX interrupt. A
> + corresponding interrupts-names property must be defined.
> + - For backward compatibility reasons, a single element interrupts
> + property is also supported for the standard variant of the IP,
> + containing only the UART sum interrupt. This form is deprecated
> + and should no longer be used.
>
> Example:
> - serial at 12000 {
> + uart0: serial at 12000 {
> compatible = "marvell,armada-3700-uart";
> reg = <0x12000 0x200>;
> - interrupts = <43>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> + status = "disabled";
Don't show status in examples.
> + };
> +
> + uart1: serial at 12200 {
> + compatible = "marvell,armada-3700-uart-ext";
> + reg = <0x12200 0x30>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "uart-tx", "uart-rx";
> + status = "disabled";
> };
> --
> 2.11.0
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
2017-10-17 22:00 ` Rob Herring
@ 2017-10-18 6:25 ` Miquel RAYNAL
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel RAYNAL @ 2017-10-18 6:25 UTC (permalink / raw)
To: Rob Herring
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon, linux-serial, devicetree,
linux-arm-kernel, linux-gpio, Thomas Petazzoni, Antoine Tenart,
Nadav Haklai, Wilson Ding
Hi Rob,
On Tue, 17 Oct 2017 17:00:22 -0500
Rob Herring <robh@kernel.org> wrote:
> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> > Update the Device Tree binding documentation for the Marvell EBU
> > UART, in order to allow describing the extended UART IP block, in
> > addition to the already supported standard UART IP. This requires
> > adding a new compatible string, the introduction of a clocks
> > property, and extensions to the interrupts property.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> > ---
> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
> > deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
> > d37fabe17bd1..3df3a3fab4bb 100644 ---
> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@ -1,13
> > +1,52 @@ -* Marvell UART : Non standard UART used in some of
> > Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non standard
> > UART used in some of Marvell EBU SoCs
> > + e.g., Armada-3700.
> >
> > Required properties:
> > -- compatible: "marvell,armada-3700-uart"
> > +- compatible:
> > + - "marvell,armada-3700-uart" for the standard variant of the
> > UART
> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
> > + FIFO, baudrate limited to 230400).
> > + - "marvell,armada-3700-uart-ext" for the extended variant of
> > the
> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
> > + accesses to the FIFO, baudrate unlimited by the dividers).
>
> What do you call the next extended version?
> marvell,armada-3700-uart-ext-ext?
I don't know what you mean by "next extended version"?
>
> This is different versions of UART on the same chip?
Today in mainline there is support for the A3700 UART IP.
This series add support for another IP, based on the A3700, but with
extended features (explaining the -ext suffix).
Can you precise what is bothering you?
>
> > - reg: offset and length of the register set for the device.
> > -- interrupts: device interrupt
> > +- clocks: UART reference clock used to derive the baudrate (only
> > + mandatory with "marvell,armada-3700-uart-ext" compatible).
>
> How is this optional? The freq is fixed if not present? If so, what
> frequency?
The "clocks" property should not be optional at all but that is how the
bindings were handled before this series, so I can't tell now that
this property is mandatory as it would break compatibility with older
versions of the driver.
When no clock is provided, the frequency is fixed by the bootloader
and cannot be changed. There is no standard frequency for it but the
one chosen by the bootloader often is 115200 as the UART is usually
used as the serial console.
Because the bootloader does only initialize the UART in use for the
serial console, the clock is mandatory when using another port or it
will not work at all.
>
> > +- interrupts:
> > + - Must contain three elements for the standard variant of the
> > IP
> > + (marvell,armada-3700-uart): "uart-sum", "uart-tx" and
> > "uart-rx",
> > + respectively the UART sum interrupt, the UART TX interrupt
> > and
> > + UART RX interrupt. A corresponding interrupt-names property
> > must
> > + be defined.
> > + - Must contain two elements for the extended variant of the IP
> > + (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
> > + respectively the UART TX interrupt and the UART RX
> > interrupt. A
> > + corresponding interrupts-names property must be defined.
> > + - For backward compatibility reasons, a single element
> > interrupts
> > + property is also supported for the standard variant of the
> > IP,
> > + containing only the UART sum interrupt. This form is
> > deprecated
> > + and should no longer be used.
> >
> > Example:
> > - serial@12000 {
> > + uart0: serial@12000 {
> > compatible = "marvell,armada-3700-uart";
> > reg = <0x12000 0x200>;
> > - interrupts = <43>;
> > + clocks = <&xtalclk>;
> > + interrupts =
> > + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> > + status = "disabled";
>
> Don't show status in examples.
Ok.
>
> > + };
> > +
> > + uart1: serial@12200 {
> > + compatible = "marvell,armada-3700-uart-ext";
> > + reg = <0x12200 0x30>;
> > + clocks = <&xtalclk>;
> > + interrupts =
> > + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "uart-tx", "uart-rx";
> > + status = "disabled";
> > };
> > --
> > 2.11.0
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe
> > devicetree" in the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
Thanks,
Miquèl
--
Miquel Raynal, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
@ 2017-10-18 6:25 ` Miquel RAYNAL
0 siblings, 0 replies; 58+ messages in thread
From: Miquel RAYNAL @ 2017-10-18 6:25 UTC (permalink / raw)
To: linux-arm-kernel
Hi Rob,
On Tue, 17 Oct 2017 17:00:22 -0500
Rob Herring <robh@kernel.org> wrote:
> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> > Update the Device Tree binding documentation for the Marvell EBU
> > UART, in order to allow describing the extended UART IP block, in
> > addition to the already supported standard UART IP. This requires
> > adding a new compatible string, the introduction of a clocks
> > property, and extensions to the interrupts property.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> > ---
> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
> > deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
> > d37fabe17bd1..3df3a3fab4bb 100644 ---
> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@ -1,13
> > +1,52 @@ -* Marvell UART : Non standard UART used in some of
> > Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non standard
> > UART used in some of Marvell EBU SoCs
> > + e.g., Armada-3700.
> >
> > Required properties:
> > -- compatible: "marvell,armada-3700-uart"
> > +- compatible:
> > + - "marvell,armada-3700-uart" for the standard variant of the
> > UART
> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
> > + FIFO, baudrate limited to 230400).
> > + - "marvell,armada-3700-uart-ext" for the extended variant of
> > the
> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
> > + accesses to the FIFO, baudrate unlimited by the dividers).
>
> What do you call the next extended version?
> marvell,armada-3700-uart-ext-ext?
I don't know what you mean by "next extended version"?
>
> This is different versions of UART on the same chip?
Today in mainline there is support for the A3700 UART IP.
This series add support for another IP, based on the A3700, but with
extended features (explaining the -ext suffix).
Can you precise what is bothering you?
>
> > - reg: offset and length of the register set for the device.
> > -- interrupts: device interrupt
> > +- clocks: UART reference clock used to derive the baudrate (only
> > + mandatory with "marvell,armada-3700-uart-ext" compatible).
>
> How is this optional? The freq is fixed if not present? If so, what
> frequency?
The "clocks" property should not be optional at all but that is how the
bindings were handled before this series, so I can't tell now that
this property is mandatory as it would break compatibility with older
versions of the driver.
When no clock is provided, the frequency is fixed by the bootloader
and cannot be changed. There is no standard frequency for it but the
one chosen by the bootloader often is 115200 as the UART is usually
used as the serial console.
Because the bootloader does only initialize the UART in use for the
serial console, the clock is mandatory when using another port or it
will not work at all.
>
> > +- interrupts:
> > + - Must contain three elements for the standard variant of the
> > IP
> > + (marvell,armada-3700-uart): "uart-sum", "uart-tx" and
> > "uart-rx",
> > + respectively the UART sum interrupt, the UART TX interrupt
> > and
> > + UART RX interrupt. A corresponding interrupt-names property
> > must
> > + be defined.
> > + - Must contain two elements for the extended variant of the IP
> > + (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
> > + respectively the UART TX interrupt and the UART RX
> > interrupt. A
> > + corresponding interrupts-names property must be defined.
> > + - For backward compatibility reasons, a single element
> > interrupts
> > + property is also supported for the standard variant of the
> > IP,
> > + containing only the UART sum interrupt. This form is
> > deprecated
> > + and should no longer be used.
> >
> > Example:
> > - serial at 12000 {
> > + uart0: serial at 12000 {
> > compatible = "marvell,armada-3700-uart";
> > reg = <0x12000 0x200>;
> > - interrupts = <43>;
> > + clocks = <&xtalclk>;
> > + interrupts =
> > + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> > + status = "disabled";
>
> Don't show status in examples.
Ok.
>
> > + };
> > +
> > + uart1: serial at 12200 {
> > + compatible = "marvell,armada-3700-uart-ext";
> > + reg = <0x12200 0x30>;
> > + clocks = <&xtalclk>;
> > + interrupts =
> > + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> > + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> > + interrupt-names = "uart-tx", "uart-rx";
> > + status = "disabled";
> > };
> > --
> > 2.11.0
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe
> > devicetree" in the body of a message to majordomo at vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
Thanks,
Miqu?l
--
Miquel Raynal, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 58+ messages in thread* Re: [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
2017-10-18 6:25 ` Miquel RAYNAL
@ 2017-10-18 13:29 ` Rob Herring
-1 siblings, 0 replies; 58+ messages in thread
From: Rob Herring @ 2017-10-18 13:29 UTC (permalink / raw)
To: Miquel RAYNAL
Cc: Thomas Petazzoni, Andrew Lunn, Catalin Marinas, Jason Cooper,
devicetree@vger.kernel.org, Greg Kroah-Hartman, Linus Walleij,
Will Deacon, Nadav Haklai, linux-gpio@vger.kernel.org,
linux-serial@vger.kernel.org, Jiri Slaby, Gregory Clement,
Wilson Ding, Antoine Tenart, linux-arm-kernel@lists.infradead.org,
Sebastian Hesselbarth
On Wed, Oct 18, 2017 at 1:25 AM, Miquel RAYNAL
<miquel.raynal@free-electrons.com> wrote:
> Hi Rob,
>
> On Tue, 17 Oct 2017 17:00:22 -0500
> Rob Herring <robh@kernel.org> wrote:
>
>> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
>> > Update the Device Tree binding documentation for the Marvell EBU
>> > UART, in order to allow describing the extended UART IP block, in
>> > addition to the already supported standard UART IP. This requires
>> > adding a new compatible string, the introduction of a clocks
>> > property, and extensions to the interrupts property.
>> >
>> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
>> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> > ---
>> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
>> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
>> > deletions(-)
>> >
>> > diff --git
>> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
>> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
>> > d37fabe17bd1..3df3a3fab4bb 100644 ---
>> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
>> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@ -1,13
>> > +1,52 @@ -* Marvell UART : Non standard UART used in some of
>> > Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non standard
>> > UART used in some of Marvell EBU SoCs
>> > + e.g., Armada-3700.
>> >
>> > Required properties:
>> > -- compatible: "marvell,armada-3700-uart"
>> > +- compatible:
>> > + - "marvell,armada-3700-uart" for the standard variant of the
>> > UART
>> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
>> > + FIFO, baudrate limited to 230400).
>> > + - "marvell,armada-3700-uart-ext" for the extended variant of
>> > the
>> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
>> > + accesses to the FIFO, baudrate unlimited by the dividers).
>>
>> What do you call the next extended version?
>> marvell,armada-3700-uart-ext-ext?
>
> I don't know what you mean by "next extended version"?
IP evolves on new chips with new features. Just trying to understand
how you are
>> This is different versions of UART on the same chip?
>
> Today in mainline there is support for the A3700 UART IP.
> This series add support for another IP, based on the A3700, but with
> extended features (explaining the -ext suffix).
>
> Can you precise what is bothering you?
Is this different versions of UART IP on 1 chip or a new version of
the UART IP on a new SoC? The latter should be a new compatible with
the new SoC. The former case does happen some, but is not common. I'm
just trying to understand which applies here.
>> > - reg: offset and length of the register set for the device.
>> > -- interrupts: device interrupt
>> > +- clocks: UART reference clock used to derive the baudrate (only
>> > + mandatory with "marvell,armada-3700-uart-ext" compatible).
>>
>> How is this optional? The freq is fixed if not present? If so, what
>> frequency?
>
> The "clocks" property should not be optional at all but that is how the
> bindings were handled before this series, so I can't tell now that
> this property is mandatory as it would break compatibility with older
> versions of the driver.
Okay. I think it should be mandatory with a note how missing property
is handled.
> When no clock is provided, the frequency is fixed by the bootloader
> and cannot be changed. There is no standard frequency for it but the
> one chosen by the bootloader often is 115200 as the UART is usually
> used as the serial console.
>
> Because the bootloader does only initialize the UART in use for the
> serial console, the clock is mandatory when using another port or it
> will not work at all.
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
@ 2017-10-18 13:29 ` Rob Herring
0 siblings, 0 replies; 58+ messages in thread
From: Rob Herring @ 2017-10-18 13:29 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Oct 18, 2017 at 1:25 AM, Miquel RAYNAL
<miquel.raynal@free-electrons.com> wrote:
> Hi Rob,
>
> On Tue, 17 Oct 2017 17:00:22 -0500
> Rob Herring <robh@kernel.org> wrote:
>
>> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
>> > Update the Device Tree binding documentation for the Marvell EBU
>> > UART, in order to allow describing the extended UART IP block, in
>> > addition to the already supported standard UART IP. This requires
>> > adding a new compatible string, the introduction of a clocks
>> > property, and extensions to the interrupts property.
>> >
>> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
>> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>> > ---
>> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
>> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
>> > deletions(-)
>> >
>> > diff --git
>> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
>> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
>> > d37fabe17bd1..3df3a3fab4bb 100644 ---
>> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
>> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@ -1,13
>> > +1,52 @@ -* Marvell UART : Non standard UART used in some of
>> > Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non standard
>> > UART used in some of Marvell EBU SoCs
>> > + e.g., Armada-3700.
>> >
>> > Required properties:
>> > -- compatible: "marvell,armada-3700-uart"
>> > +- compatible:
>> > + - "marvell,armada-3700-uart" for the standard variant of the
>> > UART
>> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
>> > + FIFO, baudrate limited to 230400).
>> > + - "marvell,armada-3700-uart-ext" for the extended variant of
>> > the
>> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
>> > + accesses to the FIFO, baudrate unlimited by the dividers).
>>
>> What do you call the next extended version?
>> marvell,armada-3700-uart-ext-ext?
>
> I don't know what you mean by "next extended version"?
IP evolves on new chips with new features. Just trying to understand
how you are
>> This is different versions of UART on the same chip?
>
> Today in mainline there is support for the A3700 UART IP.
> This series add support for another IP, based on the A3700, but with
> extended features (explaining the -ext suffix).
>
> Can you precise what is bothering you?
Is this different versions of UART IP on 1 chip or a new version of
the UART IP on a new SoC? The latter should be a new compatible with
the new SoC. The former case does happen some, but is not common. I'm
just trying to understand which applies here.
>> > - reg: offset and length of the register set for the device.
>> > -- interrupts: device interrupt
>> > +- clocks: UART reference clock used to derive the baudrate (only
>> > + mandatory with "marvell,armada-3700-uart-ext" compatible).
>>
>> How is this optional? The freq is fixed if not present? If so, what
>> frequency?
>
> The "clocks" property should not be optional at all but that is how the
> bindings were handled before this series, so I can't tell now that
> this property is mandatory as it would break compatibility with older
> versions of the driver.
Okay. I think it should be mandatory with a note how missing property
is handled.
> When no clock is provided, the frequency is fixed by the bootloader
> and cannot be changed. There is no standard frequency for it but the
> one chosen by the bootloader often is 115200 as the UART is usually
> used as the serial console.
>
> Because the bootloader does only initialize the UART in use for the
> serial console, the clock is mandatory when using another port or it
> will not work at all.
^ permalink raw reply [flat|nested] 58+ messages in thread
[parent not found: <CAL_JsqJ3VkXHnh1H2NcBhgiFE+++WvXGA9Phdgj77X-4VGX3+w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>]
* Re: [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
2017-10-18 13:29 ` Rob Herring
@ 2017-10-19 7:36 ` Miquel RAYNAL
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel RAYNAL @ 2017-10-19 7:36 UTC (permalink / raw)
To: Rob Herring
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai
Hi Rob,
On Wed, 18 Oct 2017 08:29:07 -0500
Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Wed, Oct 18, 2017 at 1:25 AM, Miquel RAYNAL
> <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> > Hi Rob,
> >
> > On Tue, 17 Oct 2017 17:00:22 -0500
> > Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> >
> >> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> >> > Update the Device Tree binding documentation for the Marvell EBU
> >> > UART, in order to allow describing the extended UART IP block, in
> >> > addition to the already supported standard UART IP. This requires
> >> > adding a new compatible string, the introduction of a clocks
> >> > property, and extensions to the interrupts property.
> >> >
> >> > Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> >> > Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> >> > ---
> >> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
> >> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
> >> > deletions(-)
> >> >
> >> > diff --git
> >> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> >> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
> >> > d37fabe17bd1..3df3a3fab4bb 100644 ---
> >> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
> >> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@
> >> > -1,13 +1,52 @@ -* Marvell UART : Non standard UART used in some
> >> > of Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non
> >> > standard UART used in some of Marvell EBU SoCs
> >> > + e.g., Armada-3700.
> >> >
> >> > Required properties:
> >> > -- compatible: "marvell,armada-3700-uart"
> >> > +- compatible:
> >> > + - "marvell,armada-3700-uart" for the standard variant of the
> >> > UART
> >> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to
> >> > the
> >> > + FIFO, baudrate limited to 230400).
> >> > + - "marvell,armada-3700-uart-ext" for the extended variant of
> >> > the
> >> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or
> >> > 32-bit
> >> > + accesses to the FIFO, baudrate unlimited by the
> >> > dividers).
> >>
> >> What do you call the next extended version?
> >> marvell,armada-3700-uart-ext-ext?
> >
> > I don't know what you mean by "next extended version"?
>
> IP evolves on new chips with new features. Just trying to understand
> how you are
I think I misunderstood your initial question.
Indeed you are right, I did not think about the naming of a potential
next extended version of the extended IP, but I don't know how to
rename it otherwise than "-ext" to best fit what the "new" IP
does.
>
> >> This is different versions of UART on the same chip?
> >
> > Today in mainline there is support for the A3700 UART IP.
> > This series add support for another IP, based on the A3700, but with
> > extended features (explaining the -ext suffix).
> >
> > Can you precise what is bothering you?
>
> Is this different versions of UART IP on 1 chip or a new version of
> the UART IP on a new SoC? The latter should be a new compatible with
> the new SoC. The former case does happen some, but is not common. I'm
> just trying to understand which applies here.
Actually, both IP are available since the first version of the
Armada 3700 SoCs. There is no other implementation of these IPs yet. I
think we fall in the former case.
>
>
> >> > - reg: offset and length of the register set for the device.
> >> > -- interrupts: device interrupt
> >> > +- clocks: UART reference clock used to derive the baudrate (only
> >> > + mandatory with "marvell,armada-3700-uart-ext"
> >> > compatible).
> >>
> >> How is this optional? The freq is fixed if not present? If so, what
> >> frequency?
> >
> > The "clocks" property should not be optional at all but that is how
> > the bindings were handled before this series, so I can't tell now
> > that this property is mandatory as it would break compatibility
> > with older versions of the driver.
>
> Okay. I think it should be mandatory with a note how missing property
> is handled.
Sure.
>
> > When no clock is provided, the frequency is fixed by the bootloader
> > and cannot be changed. There is no standard frequency for it but the
> > one chosen by the bootloader often is 115200 as the UART is usually
> > used as the serial console.
> >
> > Because the bootloader does only initialize the UART in use for the
> > serial console, the clock is mandatory when using another port or it
> > will not work at all.
Thank you,
Miquèl
--
Miquel Raynal, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH v2 01/16] dt-bindings: mvebu-uart: update documentation with extended UART
@ 2017-10-19 7:36 ` Miquel RAYNAL
0 siblings, 0 replies; 58+ messages in thread
From: Miquel RAYNAL @ 2017-10-19 7:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi Rob,
On Wed, 18 Oct 2017 08:29:07 -0500
Rob Herring <robh@kernel.org> wrote:
> On Wed, Oct 18, 2017 at 1:25 AM, Miquel RAYNAL
> <miquel.raynal@free-electrons.com> wrote:
> > Hi Rob,
> >
> > On Tue, 17 Oct 2017 17:00:22 -0500
> > Rob Herring <robh@kernel.org> wrote:
> >
> >> On Fri, Oct 13, 2017 at 11:01:45AM +0200, Miquel Raynal wrote:
> >> > Update the Device Tree binding documentation for the Marvell EBU
> >> > UART, in order to allow describing the extended UART IP block, in
> >> > addition to the already supported standard UART IP. This requires
> >> > adding a new compatible string, the introduction of a clocks
> >> > property, and extensions to the interrupts property.
> >> >
> >> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> >> > Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> >> > ---
> >> > .../devicetree/bindings/serial/mvebu-uart.txt | 49
> >> > +++++++++++++++++++--- 1 file changed, 44 insertions(+), 5
> >> > deletions(-)
> >> >
> >> > diff --git
> >> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt
> >> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index
> >> > d37fabe17bd1..3df3a3fab4bb 100644 ---
> >> > a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++
> >> > b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@
> >> > -1,13 +1,52 @@ -* Marvell UART : Non standard UART used in some
> >> > of Marvell EBU SoCs (e.g., Armada-3700) +* Marvell UART : Non
> >> > standard UART used in some of Marvell EBU SoCs
> >> > + e.g., Armada-3700.
> >> >
> >> > Required properties:
> >> > -- compatible: "marvell,armada-3700-uart"
> >> > +- compatible:
> >> > + - "marvell,armada-3700-uart" for the standard variant of the
> >> > UART
> >> > + (32 bytes FIFO, no DMA, level interrupts, 8-bit access to
> >> > the
> >> > + FIFO, baudrate limited to 230400).
> >> > + - "marvell,armada-3700-uart-ext" for the extended variant of
> >> > the
> >> > + UART (128 bytes FIFO, DMA, front interrupts, 8-bit or
> >> > 32-bit
> >> > + accesses to the FIFO, baudrate unlimited by the
> >> > dividers).
> >>
> >> What do you call the next extended version?
> >> marvell,armada-3700-uart-ext-ext?
> >
> > I don't know what you mean by "next extended version"?
>
> IP evolves on new chips with new features. Just trying to understand
> how you are
I think I misunderstood your initial question.
Indeed you are right, I did not think about the naming of a potential
next extended version of the extended IP, but I don't know how to
rename it otherwise than "-ext" to best fit what the "new" IP
does.
>
> >> This is different versions of UART on the same chip?
> >
> > Today in mainline there is support for the A3700 UART IP.
> > This series add support for another IP, based on the A3700, but with
> > extended features (explaining the -ext suffix).
> >
> > Can you precise what is bothering you?
>
> Is this different versions of UART IP on 1 chip or a new version of
> the UART IP on a new SoC? The latter should be a new compatible with
> the new SoC. The former case does happen some, but is not common. I'm
> just trying to understand which applies here.
Actually, both IP are available since the first version of the
Armada 3700 SoCs. There is no other implementation of these IPs yet. I
think we fall in the former case.
>
>
> >> > - reg: offset and length of the register set for the device.
> >> > -- interrupts: device interrupt
> >> > +- clocks: UART reference clock used to derive the baudrate (only
> >> > + mandatory with "marvell,armada-3700-uart-ext"
> >> > compatible).
> >>
> >> How is this optional? The freq is fixed if not present? If so, what
> >> frequency?
> >
> > The "clocks" property should not be optional at all but that is how
> > the bindings were handled before this series, so I can't tell now
> > that this property is mandatory as it would break compatibility
> > with older versions of the driver.
>
> Okay. I think it should be mandatory with a note how missing property
> is handled.
Sure.
>
> > When no clock is provided, the frequency is fixed by the bootloader
> > and cannot be changed. There is no standard frequency for it but the
> > one chosen by the bootloader often is 115200 as the UART is usually
> > used as the serial console.
> >
> > Because the bootloader does only initialize the UART in use for the
> > serial console, the clock is mandatory when using another port or it
> > will not work at all.
Thank you,
Miqu?l
--
Miquel Raynal, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH v2 02/16] pinctrl: dt-bindings: Fix A37xx uart2 group name
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
Fix a typo in A37xx pin controllers documentation about uart2 pin group.
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
.../devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
index f64060908d5a..c7c088d2dd50 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
@@ -97,8 +97,8 @@ group spi_quad
- pins 15-16
- functions spi, gpio
-group uart_2
- - pins 9-10
+group uart2
+ - pins 9-10 and 18-19
- functions uart, gpio
Available groups and functions for the South bridge:
--
2.11.0
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 58+ messages in thread
* [PATCH v2 02/16] pinctrl: dt-bindings: Fix A37xx uart2 group name
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
Fix a typo in A37xx pin controllers documentation about uart2 pin group.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
.../devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
index f64060908d5a..c7c088d2dd50 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
@@ -97,8 +97,8 @@ group spi_quad
- pins 15-16
- functions spi, gpio
-group uart_2
- - pins 9-10
+group uart2
+ - pins 9-10 and 18-19
- functions uart, gpio
Available groups and functions for the South bridge:
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread
* Re: [PATCH v2 02/16] pinctrl: dt-bindings: Fix A37xx uart2 group name
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-16 11:56 ` Linus Walleij
-1 siblings, 0 replies; 58+ messages in thread
From: Linus Walleij @ 2017-10-16 11:56 UTC (permalink / raw)
To: Miquel Raynal
Cc: Greg Kroah-Hartman, Jason Cooper, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Jiri Slaby, Catalin Marinas, Will Deacon,
linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai, Wilson Ding
On Fri, Oct 13, 2017 at 11:01 AM, Miquel Raynal
<miquel.raynal@free-electrons.com> wrote:
> Fix a typo in A37xx pin controllers documentation about uart2 pin group.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Patch applied to the pinctrl tree.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH v2 02/16] pinctrl: dt-bindings: Fix A37xx uart2 group name
@ 2017-10-16 11:56 ` Linus Walleij
0 siblings, 0 replies; 58+ messages in thread
From: Linus Walleij @ 2017-10-16 11:56 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Oct 13, 2017 at 11:01 AM, Miquel Raynal
<miquel.raynal@free-electrons.com> wrote:
> Fix a typo in A37xx pin controllers documentation about uart2 pin group.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Patch applied to the pinctrl tree.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH v2 05/16] serial: mvebu-uart: use a generic way to access the registers
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
There are two UART ports on Armada3700. The second UART is based on the
first one, plus additional features, but it has a different register
layout (some bit fields are also moved inside the registers).
Clearly separate register offsets and bit fields that differ between the
standard and the extended IP. Access them in a generic way. Rename the
defines with the "STD" prefix for future distinction with "EXT" defines.
Point to these defines in the main driver data structure.
The early console only uses the standard port (not extended).
Suggested-by: Wilson Ding <dingwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
drivers/tty/serial/mvebu-uart.c | 213 ++++++++++++++++++++++++++--------------
1 file changed, 140 insertions(+), 73 deletions(-)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index f3c7271db32b..900fe85796d6 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -38,46 +38,32 @@
#include <linux/tty_flip.h>
/* Register Map */
-#define UART_RBR 0x00
-#define RBR_BRK_DET BIT(15)
-#define RBR_FRM_ERR_DET BIT(14)
-#define RBR_PAR_ERR_DET BIT(13)
-#define RBR_OVR_ERR_DET BIT(12)
+#define UART_STD_RBR 0x00
-#define UART_TSH 0x04
+#define UART_STD_TSH 0x04
-#define UART_CTRL 0x08
+#define UART_STD_CTRL1 0x08
#define CTRL_SOFT_RST BIT(31)
#define CTRL_TXFIFO_RST BIT(15)
#define CTRL_RXFIFO_RST BIT(14)
-#define CTRL_ST_MIRR_EN BIT(13)
-#define CTRL_LPBK_EN BIT(12)
#define CTRL_SND_BRK_SEQ BIT(11)
-#define CTRL_PAR_EN BIT(10)
-#define CTRL_TWO_STOP BIT(9)
-#define CTRL_TX_HFL_INT BIT(8)
-#define CTRL_RX_HFL_INT BIT(7)
-#define CTRL_TX_EMP_INT BIT(6)
-#define CTRL_TX_RDY_INT BIT(5)
-#define CTRL_RX_RDY_INT BIT(4)
#define CTRL_BRK_DET_INT BIT(3)
#define CTRL_FRM_ERR_INT BIT(2)
#define CTRL_PAR_ERR_INT BIT(1)
#define CTRL_OVR_ERR_INT BIT(0)
-#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
- CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
+#define CTRL_BRK_INT (CTRL_BRK_DET_INT | CTRL_FRM_ERR_INT | \
+ CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
-#define UART_STAT 0x0c
+#define UART_STD_CTRL2 UART_STD_CTRL1
+#define CTRL_STD_TX_RDY_INT BIT(5)
+#define CTRL_STD_RX_RDY_INT BIT(4)
+
+#define UART_STAT 0x0C
#define STAT_TX_FIFO_EMP BIT(13)
-#define STAT_RX_FIFO_EMP BIT(12)
#define STAT_TX_FIFO_FUL BIT(11)
-#define STAT_TX_FIFO_HFL BIT(10)
-#define STAT_RX_TOGL BIT(9)
-#define STAT_RX_FIFO_FUL BIT(8)
-#define STAT_RX_FIFO_HFL BIT(7)
#define STAT_TX_EMP BIT(6)
-#define STAT_TX_RDY BIT(5)
-#define STAT_RX_RDY BIT(4)
+#define STAT_STD_TX_RDY BIT(5)
+#define STAT_STD_RX_RDY BIT(4)
#define STAT_BRK_DET BIT(3)
#define STAT_FRM_ERR BIT(2)
#define STAT_PAR_ERR BIT(1)
@@ -92,13 +78,55 @@
#define MVEBU_UART_TYPE "mvebu-uart"
#define DRIVER_NAME "mvebu_serial"
-static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+/* Register offsets, different depending on the UART */
+struct uart_regs_layout {
+ unsigned int rbr;
+ unsigned int tsh;
+ unsigned int ctrl;
+ unsigned int intr;
+};
+
+/* Diverging flags */
+struct uart_flags {
+ unsigned int ctrl_tx_rdy_int;
+ unsigned int ctrl_rx_rdy_int;
+ unsigned int stat_tx_rdy;
+ unsigned int stat_rx_rdy;
+};
+
+/* Driver data, a structure for each UART port */
+struct mvebu_uart_driver_data {
+ bool is_ext;
+ struct uart_regs_layout regs;
+ struct uart_flags flags;
+};
-struct mvebu_uart_data {
+/* MVEBU UART driver structure */
+struct mvebu_uart {
struct uart_port *port;
- struct clk *clk;
+ struct clk *clk;
+ struct mvebu_uart_driver_data *data;
};
+static struct mvebu_uart *to_mvuart(struct uart_port *port)
+{
+ return (struct mvebu_uart *)port->private_data;
+}
+
+#define IS_EXTENDED(port) (to_mvuart(port)->data->is_ext)
+
+#define UART_RBR(port) (to_mvuart(port)->data->regs.rbr)
+#define UART_TSH(port) (to_mvuart(port)->data->regs.tsh)
+#define UART_CTRL(port) (to_mvuart(port)->data->regs.ctrl)
+#define UART_INTR(port) (to_mvuart(port)->data->regs.intr)
+
+#define CTRL_TX_RDY_INT(port) (to_mvuart(port)->data->flags.ctrl_tx_rdy_int)
+#define CTRL_RX_RDY_INT(port) (to_mvuart(port)->data->flags.ctrl_rx_rdy_int)
+#define STAT_TX_RDY(port) (to_mvuart(port)->data->flags.stat_tx_rdy)
+#define STAT_RX_RDY(port) (to_mvuart(port)->data->flags.stat_rx_rdy)
+
+static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+
/* Core UART Driver Operations */
static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
{
@@ -128,26 +156,31 @@ static void mvebu_uart_set_mctrl(struct uart_port *port,
static void mvebu_uart_stop_tx(struct uart_port *port)
{
- unsigned int ctl = readl(port->membase + UART_CTRL);
+ unsigned int ctl = readl(port->membase + UART_INTR(port));
- ctl &= ~CTRL_TX_RDY_INT;
- writel(ctl, port->membase + UART_CTRL);
+ ctl &= ~CTRL_TX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
}
static void mvebu_uart_start_tx(struct uart_port *port)
{
- unsigned int ctl = readl(port->membase + UART_CTRL);
+ unsigned int ctl = readl(port->membase + UART_INTR(port));
- ctl |= CTRL_TX_RDY_INT;
- writel(ctl, port->membase + UART_CTRL);
+ ctl |= CTRL_TX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
}
static void mvebu_uart_stop_rx(struct uart_port *port)
{
- unsigned int ctl = readl(port->membase + UART_CTRL);
+ unsigned int ctl;
- ctl &= ~CTRL_RX_INT;
- writel(ctl, port->membase + UART_CTRL);
+ ctl = readl(port->membase + UART_CTRL(port));
+ ctl &= ~CTRL_BRK_INT;
+ writel(ctl, port->membase + UART_CTRL(port));
+
+ ctl = readl(port->membase + UART_INTR(port));
+ ctl &= ~CTRL_RX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
}
static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
@@ -156,12 +189,12 @@ static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
unsigned long flags;
spin_lock_irqsave(&port->lock, flags);
- ctl = readl(port->membase + UART_CTRL);
+ ctl = readl(port->membase + UART_CTRL(port));
if (brk == -1)
ctl |= CTRL_SND_BRK_SEQ;
else
ctl &= ~CTRL_SND_BRK_SEQ;
- writel(ctl, port->membase + UART_CTRL);
+ writel(ctl, port->membase + UART_CTRL(port));
spin_unlock_irqrestore(&port->lock, flags);
}
@@ -172,8 +205,8 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
char flag = 0;
do {
- if (status & STAT_RX_RDY) {
- ch = readl(port->membase + UART_RBR);
+ if (status & STAT_RX_RDY(port)) {
+ ch = readl(port->membase + UART_RBR(port));
ch &= 0xff;
flag = TTY_NORMAL;
port->icount.rx++;
@@ -199,7 +232,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
goto ignore_char;
if (status & port->ignore_status_mask & STAT_PAR_ERR)
- status &= ~STAT_RX_RDY;
+ status &= ~STAT_RX_RDY(port);
status &= port->read_status_mask;
@@ -208,7 +241,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
status &= ~port->ignore_status_mask;
- if (status & STAT_RX_RDY)
+ if (status & STAT_RX_RDY(port))
tty_insert_flip_char(tport, ch, flag);
if (status & STAT_BRK_DET)
@@ -222,7 +255,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
ignore_char:
status = readl(port->membase + UART_STAT);
- } while (status & (STAT_RX_RDY | STAT_BRK_DET));
+ } while (status & (STAT_RX_RDY(port) | STAT_BRK_DET));
tty_flip_buffer_push(tport);
}
@@ -234,7 +267,7 @@ static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
unsigned int st;
if (port->x_char) {
- writel(port->x_char, port->membase + UART_TSH);
+ writel(port->x_char, port->membase + UART_TSH(port));
port->icount.tx++;
port->x_char = 0;
return;
@@ -246,7 +279,7 @@ static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
}
for (count = 0; count < port->fifosize; count++) {
- writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
+ writel(xmit->buf[xmit->tail], port->membase + UART_TSH(port));
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
@@ -270,10 +303,11 @@ static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
struct uart_port *port = (struct uart_port *)dev_id;
unsigned int st = readl(port->membase + UART_STAT);
- if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
+ if (st & (STAT_RX_RDY(port) | STAT_OVR_ERR | STAT_FRM_ERR |
+ STAT_BRK_DET))
mvebu_uart_rx_chars(port, st);
- if (st & STAT_TX_RDY)
+ if (st & STAT_TX_RDY(port))
mvebu_uart_tx_chars(port, st);
return IRQ_HANDLED;
@@ -281,12 +315,17 @@ static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
static int mvebu_uart_startup(struct uart_port *port)
{
+ unsigned int ctl;
int ret;
writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
- port->membase + UART_CTRL);
+ port->membase + UART_CTRL(port));
udelay(1);
- writel(CTRL_RX_INT, port->membase + UART_CTRL);
+ writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
+
+ ctl = readl(port->membase + UART_INTR(port));
+ ctl |= CTRL_RX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags,
DRIVER_NAME, port);
@@ -300,7 +339,7 @@ static int mvebu_uart_startup(struct uart_port *port)
static void mvebu_uart_shutdown(struct uart_port *port)
{
- writel(0, port->membase + UART_CTRL);
+ writel(0, port->membase + UART_INTR(port));
free_irq(port->irq, port);
}
@@ -314,8 +353,8 @@ static void mvebu_uart_set_termios(struct uart_port *port,
spin_lock_irqsave(&port->lock, flags);
- port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
- STAT_TX_RDY | STAT_TX_FIFO_FUL;
+ port->read_status_mask = STAT_RX_RDY(port) | STAT_OVR_ERR |
+ STAT_TX_RDY(port) | STAT_TX_FIFO_FUL;
if (termios->c_iflag & INPCK)
port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
@@ -326,7 +365,7 @@ static void mvebu_uart_set_termios(struct uart_port *port,
STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
if ((termios->c_cflag & CREAD) == 0)
- port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
+ port->ignore_status_mask |= STAT_RX_RDY(port) | STAT_BRK_ERR;
if (old)
tty_termios_copy_hw(termios, old);
@@ -357,10 +396,10 @@ static int mvebu_uart_get_poll_char(struct uart_port *port)
{
unsigned int st = readl(port->membase + UART_STAT);
- if (!(st & STAT_RX_RDY))
+ if (!(st & STAT_RX_RDY(port)))
return NO_POLL_CHAR;
- return readl(port->membase + UART_RBR);
+ return readl(port->membase + UART_RBR(port));
}
static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
@@ -376,7 +415,7 @@ static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
udelay(1);
}
- writel(c, port->membase + UART_TSH);
+ writel(c, port->membase + UART_TSH(port));
}
#endif
@@ -414,7 +453,8 @@ static void mvebu_uart_putc(struct uart_port *port, int c)
break;
}
- writel(c, port->membase + UART_TSH);
+ /* At early stage, DT is not parsed yet, only use UART0 */
+ writel(c, port->membase + UART_STD_TSH);
for (;;) {
st = readl(port->membase + UART_STAT);
@@ -459,7 +499,7 @@ static void wait_for_xmitr(struct uart_port *port)
static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
{
wait_for_xmitr(port);
- writel(ch, port->membase + UART_TSH);
+ writel(ch, port->membase + UART_TSH(port));
}
static void mvebu_uart_console_write(struct console *co, const char *s,
@@ -467,7 +507,7 @@ static void mvebu_uart_console_write(struct console *co, const char *s,
{
struct uart_port *port = &mvebu_uart_ports[co->index];
unsigned long flags;
- unsigned int ier;
+ unsigned int ier, intr, ctl;
int locked = 1;
if (oops_in_progress)
@@ -475,16 +515,23 @@ static void mvebu_uart_console_write(struct console *co, const char *s,
else
spin_lock_irqsave(&port->lock, flags);
- ier = readl(port->membase + UART_CTRL) &
- (CTRL_RX_INT | CTRL_TX_RDY_INT);
- writel(0, port->membase + UART_CTRL);
+ ier = readl(port->membase + UART_CTRL(port)) & CTRL_BRK_INT;
+ intr = readl(port->membase + UART_INTR(port)) &
+ (CTRL_RX_RDY_INT(port) | CTRL_TX_RDY_INT(port));
+ writel(0, port->membase + UART_CTRL(port));
+ writel(0, port->membase + UART_INTR(port));
uart_console_write(port, s, count, mvebu_uart_console_putchar);
wait_for_xmitr(port);
if (ier)
- writel(ier, port->membase + UART_CTRL);
+ writel(ier, port->membase + UART_CTRL(port));
+
+ if (intr) {
+ ctl = intr | readl(port->membase + UART_INTR(port));
+ writel(ctl, port->membase + UART_INTR(port));
+ }
if (locked)
spin_unlock_irqrestore(&port->lock, flags);
@@ -547,6 +594,8 @@ static struct uart_driver mvebu_uart_driver = {
#endif
};
+static const struct of_device_id mvebu_uart_of_match[];
+
/* Counter to keep track of each UART port id when not using CONFIG_OF */
static int uart_num_counter;
@@ -554,8 +603,10 @@ static int mvebu_uart_probe(struct platform_device *pdev)
{
struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ const struct of_device_id *match = of_match_device(mvebu_uart_of_match,
+ &pdev->dev);
struct uart_port *port;
- struct mvebu_uart_data *data;
+ struct mvebu_uart *mvuart;
int ret, id;
if (!reg || !irq) {
@@ -598,15 +649,16 @@ static int mvebu_uart_probe(struct platform_device *pdev)
if (IS_ERR(port->membase))
return -PTR_ERR(port->membase);
- data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
- GFP_KERNEL);
- if (!data)
+ mvuart = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart),
+ GFP_KERNEL);
+ if (!mvuart)
return -ENOMEM;
- data->port = port;
+ mvuart->data = (struct mvebu_uart_driver_data *)match->data;
+ mvuart->port = port;
- port->private_data = data;
- platform_set_drvdata(pdev, data);
+ port->private_data = mvuart;
+ platform_set_drvdata(pdev, mvuart);
ret = uart_add_one_port(&mvebu_uart_driver, port);
if (ret)
@@ -614,9 +666,24 @@ static int mvebu_uart_probe(struct platform_device *pdev)
return 0;
}
+static struct mvebu_uart_driver_data uart_std_driver_data = {
+ .is_ext = false,
+ .regs.rbr = UART_STD_RBR,
+ .regs.tsh = UART_STD_TSH,
+ .regs.ctrl = UART_STD_CTRL1,
+ .regs.intr = UART_STD_CTRL2,
+ .flags.ctrl_tx_rdy_int = CTRL_STD_TX_RDY_INT,
+ .flags.ctrl_rx_rdy_int = CTRL_STD_RX_RDY_INT,
+ .flags.stat_tx_rdy = STAT_STD_TX_RDY,
+ .flags.stat_rx_rdy = STAT_STD_RX_RDY,
+};
+
/* Match table for of_platform binding */
static const struct of_device_id mvebu_uart_of_match[] = {
- { .compatible = "marvell,armada-3700-uart", },
+ {
+ .compatible = "marvell,armada-3700-uart",
+ .data = (void *)&uart_std_driver_data,
+ },
{}
};
--
2.11.0
--
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^ permalink raw reply related [flat|nested] 58+ messages in thread* [PATCH v2 05/16] serial: mvebu-uart: use a generic way to access the registers
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
There are two UART ports on Armada3700. The second UART is based on the
first one, plus additional features, but it has a different register
layout (some bit fields are also moved inside the registers).
Clearly separate register offsets and bit fields that differ between the
standard and the extended IP. Access them in a generic way. Rename the
defines with the "STD" prefix for future distinction with "EXT" defines.
Point to these defines in the main driver data structure.
The early console only uses the standard port (not extended).
Suggested-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/tty/serial/mvebu-uart.c | 213 ++++++++++++++++++++++++++--------------
1 file changed, 140 insertions(+), 73 deletions(-)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index f3c7271db32b..900fe85796d6 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -38,46 +38,32 @@
#include <linux/tty_flip.h>
/* Register Map */
-#define UART_RBR 0x00
-#define RBR_BRK_DET BIT(15)
-#define RBR_FRM_ERR_DET BIT(14)
-#define RBR_PAR_ERR_DET BIT(13)
-#define RBR_OVR_ERR_DET BIT(12)
+#define UART_STD_RBR 0x00
-#define UART_TSH 0x04
+#define UART_STD_TSH 0x04
-#define UART_CTRL 0x08
+#define UART_STD_CTRL1 0x08
#define CTRL_SOFT_RST BIT(31)
#define CTRL_TXFIFO_RST BIT(15)
#define CTRL_RXFIFO_RST BIT(14)
-#define CTRL_ST_MIRR_EN BIT(13)
-#define CTRL_LPBK_EN BIT(12)
#define CTRL_SND_BRK_SEQ BIT(11)
-#define CTRL_PAR_EN BIT(10)
-#define CTRL_TWO_STOP BIT(9)
-#define CTRL_TX_HFL_INT BIT(8)
-#define CTRL_RX_HFL_INT BIT(7)
-#define CTRL_TX_EMP_INT BIT(6)
-#define CTRL_TX_RDY_INT BIT(5)
-#define CTRL_RX_RDY_INT BIT(4)
#define CTRL_BRK_DET_INT BIT(3)
#define CTRL_FRM_ERR_INT BIT(2)
#define CTRL_PAR_ERR_INT BIT(1)
#define CTRL_OVR_ERR_INT BIT(0)
-#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
- CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
+#define CTRL_BRK_INT (CTRL_BRK_DET_INT | CTRL_FRM_ERR_INT | \
+ CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
-#define UART_STAT 0x0c
+#define UART_STD_CTRL2 UART_STD_CTRL1
+#define CTRL_STD_TX_RDY_INT BIT(5)
+#define CTRL_STD_RX_RDY_INT BIT(4)
+
+#define UART_STAT 0x0C
#define STAT_TX_FIFO_EMP BIT(13)
-#define STAT_RX_FIFO_EMP BIT(12)
#define STAT_TX_FIFO_FUL BIT(11)
-#define STAT_TX_FIFO_HFL BIT(10)
-#define STAT_RX_TOGL BIT(9)
-#define STAT_RX_FIFO_FUL BIT(8)
-#define STAT_RX_FIFO_HFL BIT(7)
#define STAT_TX_EMP BIT(6)
-#define STAT_TX_RDY BIT(5)
-#define STAT_RX_RDY BIT(4)
+#define STAT_STD_TX_RDY BIT(5)
+#define STAT_STD_RX_RDY BIT(4)
#define STAT_BRK_DET BIT(3)
#define STAT_FRM_ERR BIT(2)
#define STAT_PAR_ERR BIT(1)
@@ -92,13 +78,55 @@
#define MVEBU_UART_TYPE "mvebu-uart"
#define DRIVER_NAME "mvebu_serial"
-static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+/* Register offsets, different depending on the UART */
+struct uart_regs_layout {
+ unsigned int rbr;
+ unsigned int tsh;
+ unsigned int ctrl;
+ unsigned int intr;
+};
+
+/* Diverging flags */
+struct uart_flags {
+ unsigned int ctrl_tx_rdy_int;
+ unsigned int ctrl_rx_rdy_int;
+ unsigned int stat_tx_rdy;
+ unsigned int stat_rx_rdy;
+};
+
+/* Driver data, a structure for each UART port */
+struct mvebu_uart_driver_data {
+ bool is_ext;
+ struct uart_regs_layout regs;
+ struct uart_flags flags;
+};
-struct mvebu_uart_data {
+/* MVEBU UART driver structure */
+struct mvebu_uart {
struct uart_port *port;
- struct clk *clk;
+ struct clk *clk;
+ struct mvebu_uart_driver_data *data;
};
+static struct mvebu_uart *to_mvuart(struct uart_port *port)
+{
+ return (struct mvebu_uart *)port->private_data;
+}
+
+#define IS_EXTENDED(port) (to_mvuart(port)->data->is_ext)
+
+#define UART_RBR(port) (to_mvuart(port)->data->regs.rbr)
+#define UART_TSH(port) (to_mvuart(port)->data->regs.tsh)
+#define UART_CTRL(port) (to_mvuart(port)->data->regs.ctrl)
+#define UART_INTR(port) (to_mvuart(port)->data->regs.intr)
+
+#define CTRL_TX_RDY_INT(port) (to_mvuart(port)->data->flags.ctrl_tx_rdy_int)
+#define CTRL_RX_RDY_INT(port) (to_mvuart(port)->data->flags.ctrl_rx_rdy_int)
+#define STAT_TX_RDY(port) (to_mvuart(port)->data->flags.stat_tx_rdy)
+#define STAT_RX_RDY(port) (to_mvuart(port)->data->flags.stat_rx_rdy)
+
+static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
+
/* Core UART Driver Operations */
static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
{
@@ -128,26 +156,31 @@ static void mvebu_uart_set_mctrl(struct uart_port *port,
static void mvebu_uart_stop_tx(struct uart_port *port)
{
- unsigned int ctl = readl(port->membase + UART_CTRL);
+ unsigned int ctl = readl(port->membase + UART_INTR(port));
- ctl &= ~CTRL_TX_RDY_INT;
- writel(ctl, port->membase + UART_CTRL);
+ ctl &= ~CTRL_TX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
}
static void mvebu_uart_start_tx(struct uart_port *port)
{
- unsigned int ctl = readl(port->membase + UART_CTRL);
+ unsigned int ctl = readl(port->membase + UART_INTR(port));
- ctl |= CTRL_TX_RDY_INT;
- writel(ctl, port->membase + UART_CTRL);
+ ctl |= CTRL_TX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
}
static void mvebu_uart_stop_rx(struct uart_port *port)
{
- unsigned int ctl = readl(port->membase + UART_CTRL);
+ unsigned int ctl;
- ctl &= ~CTRL_RX_INT;
- writel(ctl, port->membase + UART_CTRL);
+ ctl = readl(port->membase + UART_CTRL(port));
+ ctl &= ~CTRL_BRK_INT;
+ writel(ctl, port->membase + UART_CTRL(port));
+
+ ctl = readl(port->membase + UART_INTR(port));
+ ctl &= ~CTRL_RX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
}
static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
@@ -156,12 +189,12 @@ static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
unsigned long flags;
spin_lock_irqsave(&port->lock, flags);
- ctl = readl(port->membase + UART_CTRL);
+ ctl = readl(port->membase + UART_CTRL(port));
if (brk == -1)
ctl |= CTRL_SND_BRK_SEQ;
else
ctl &= ~CTRL_SND_BRK_SEQ;
- writel(ctl, port->membase + UART_CTRL);
+ writel(ctl, port->membase + UART_CTRL(port));
spin_unlock_irqrestore(&port->lock, flags);
}
@@ -172,8 +205,8 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
char flag = 0;
do {
- if (status & STAT_RX_RDY) {
- ch = readl(port->membase + UART_RBR);
+ if (status & STAT_RX_RDY(port)) {
+ ch = readl(port->membase + UART_RBR(port));
ch &= 0xff;
flag = TTY_NORMAL;
port->icount.rx++;
@@ -199,7 +232,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
goto ignore_char;
if (status & port->ignore_status_mask & STAT_PAR_ERR)
- status &= ~STAT_RX_RDY;
+ status &= ~STAT_RX_RDY(port);
status &= port->read_status_mask;
@@ -208,7 +241,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
status &= ~port->ignore_status_mask;
- if (status & STAT_RX_RDY)
+ if (status & STAT_RX_RDY(port))
tty_insert_flip_char(tport, ch, flag);
if (status & STAT_BRK_DET)
@@ -222,7 +255,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
ignore_char:
status = readl(port->membase + UART_STAT);
- } while (status & (STAT_RX_RDY | STAT_BRK_DET));
+ } while (status & (STAT_RX_RDY(port) | STAT_BRK_DET));
tty_flip_buffer_push(tport);
}
@@ -234,7 +267,7 @@ static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
unsigned int st;
if (port->x_char) {
- writel(port->x_char, port->membase + UART_TSH);
+ writel(port->x_char, port->membase + UART_TSH(port));
port->icount.tx++;
port->x_char = 0;
return;
@@ -246,7 +279,7 @@ static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
}
for (count = 0; count < port->fifosize; count++) {
- writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
+ writel(xmit->buf[xmit->tail], port->membase + UART_TSH(port));
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
@@ -270,10 +303,11 @@ static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
struct uart_port *port = (struct uart_port *)dev_id;
unsigned int st = readl(port->membase + UART_STAT);
- if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
+ if (st & (STAT_RX_RDY(port) | STAT_OVR_ERR | STAT_FRM_ERR |
+ STAT_BRK_DET))
mvebu_uart_rx_chars(port, st);
- if (st & STAT_TX_RDY)
+ if (st & STAT_TX_RDY(port))
mvebu_uart_tx_chars(port, st);
return IRQ_HANDLED;
@@ -281,12 +315,17 @@ static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
static int mvebu_uart_startup(struct uart_port *port)
{
+ unsigned int ctl;
int ret;
writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
- port->membase + UART_CTRL);
+ port->membase + UART_CTRL(port));
udelay(1);
- writel(CTRL_RX_INT, port->membase + UART_CTRL);
+ writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
+
+ ctl = readl(port->membase + UART_INTR(port));
+ ctl |= CTRL_RX_RDY_INT(port);
+ writel(ctl, port->membase + UART_INTR(port));
ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags,
DRIVER_NAME, port);
@@ -300,7 +339,7 @@ static int mvebu_uart_startup(struct uart_port *port)
static void mvebu_uart_shutdown(struct uart_port *port)
{
- writel(0, port->membase + UART_CTRL);
+ writel(0, port->membase + UART_INTR(port));
free_irq(port->irq, port);
}
@@ -314,8 +353,8 @@ static void mvebu_uart_set_termios(struct uart_port *port,
spin_lock_irqsave(&port->lock, flags);
- port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
- STAT_TX_RDY | STAT_TX_FIFO_FUL;
+ port->read_status_mask = STAT_RX_RDY(port) | STAT_OVR_ERR |
+ STAT_TX_RDY(port) | STAT_TX_FIFO_FUL;
if (termios->c_iflag & INPCK)
port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
@@ -326,7 +365,7 @@ static void mvebu_uart_set_termios(struct uart_port *port,
STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
if ((termios->c_cflag & CREAD) == 0)
- port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
+ port->ignore_status_mask |= STAT_RX_RDY(port) | STAT_BRK_ERR;
if (old)
tty_termios_copy_hw(termios, old);
@@ -357,10 +396,10 @@ static int mvebu_uart_get_poll_char(struct uart_port *port)
{
unsigned int st = readl(port->membase + UART_STAT);
- if (!(st & STAT_RX_RDY))
+ if (!(st & STAT_RX_RDY(port)))
return NO_POLL_CHAR;
- return readl(port->membase + UART_RBR);
+ return readl(port->membase + UART_RBR(port));
}
static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
@@ -376,7 +415,7 @@ static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
udelay(1);
}
- writel(c, port->membase + UART_TSH);
+ writel(c, port->membase + UART_TSH(port));
}
#endif
@@ -414,7 +453,8 @@ static void mvebu_uart_putc(struct uart_port *port, int c)
break;
}
- writel(c, port->membase + UART_TSH);
+ /* At early stage, DT is not parsed yet, only use UART0 */
+ writel(c, port->membase + UART_STD_TSH);
for (;;) {
st = readl(port->membase + UART_STAT);
@@ -459,7 +499,7 @@ static void wait_for_xmitr(struct uart_port *port)
static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
{
wait_for_xmitr(port);
- writel(ch, port->membase + UART_TSH);
+ writel(ch, port->membase + UART_TSH(port));
}
static void mvebu_uart_console_write(struct console *co, const char *s,
@@ -467,7 +507,7 @@ static void mvebu_uart_console_write(struct console *co, const char *s,
{
struct uart_port *port = &mvebu_uart_ports[co->index];
unsigned long flags;
- unsigned int ier;
+ unsigned int ier, intr, ctl;
int locked = 1;
if (oops_in_progress)
@@ -475,16 +515,23 @@ static void mvebu_uart_console_write(struct console *co, const char *s,
else
spin_lock_irqsave(&port->lock, flags);
- ier = readl(port->membase + UART_CTRL) &
- (CTRL_RX_INT | CTRL_TX_RDY_INT);
- writel(0, port->membase + UART_CTRL);
+ ier = readl(port->membase + UART_CTRL(port)) & CTRL_BRK_INT;
+ intr = readl(port->membase + UART_INTR(port)) &
+ (CTRL_RX_RDY_INT(port) | CTRL_TX_RDY_INT(port));
+ writel(0, port->membase + UART_CTRL(port));
+ writel(0, port->membase + UART_INTR(port));
uart_console_write(port, s, count, mvebu_uart_console_putchar);
wait_for_xmitr(port);
if (ier)
- writel(ier, port->membase + UART_CTRL);
+ writel(ier, port->membase + UART_CTRL(port));
+
+ if (intr) {
+ ctl = intr | readl(port->membase + UART_INTR(port));
+ writel(ctl, port->membase + UART_INTR(port));
+ }
if (locked)
spin_unlock_irqrestore(&port->lock, flags);
@@ -547,6 +594,8 @@ static struct uart_driver mvebu_uart_driver = {
#endif
};
+static const struct of_device_id mvebu_uart_of_match[];
+
/* Counter to keep track of each UART port id when not using CONFIG_OF */
static int uart_num_counter;
@@ -554,8 +603,10 @@ static int mvebu_uart_probe(struct platform_device *pdev)
{
struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ const struct of_device_id *match = of_match_device(mvebu_uart_of_match,
+ &pdev->dev);
struct uart_port *port;
- struct mvebu_uart_data *data;
+ struct mvebu_uart *mvuart;
int ret, id;
if (!reg || !irq) {
@@ -598,15 +649,16 @@ static int mvebu_uart_probe(struct platform_device *pdev)
if (IS_ERR(port->membase))
return -PTR_ERR(port->membase);
- data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
- GFP_KERNEL);
- if (!data)
+ mvuart = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart),
+ GFP_KERNEL);
+ if (!mvuart)
return -ENOMEM;
- data->port = port;
+ mvuart->data = (struct mvebu_uart_driver_data *)match->data;
+ mvuart->port = port;
- port->private_data = data;
- platform_set_drvdata(pdev, data);
+ port->private_data = mvuart;
+ platform_set_drvdata(pdev, mvuart);
ret = uart_add_one_port(&mvebu_uart_driver, port);
if (ret)
@@ -614,9 +666,24 @@ static int mvebu_uart_probe(struct platform_device *pdev)
return 0;
}
+static struct mvebu_uart_driver_data uart_std_driver_data = {
+ .is_ext = false,
+ .regs.rbr = UART_STD_RBR,
+ .regs.tsh = UART_STD_TSH,
+ .regs.ctrl = UART_STD_CTRL1,
+ .regs.intr = UART_STD_CTRL2,
+ .flags.ctrl_tx_rdy_int = CTRL_STD_TX_RDY_INT,
+ .flags.ctrl_rx_rdy_int = CTRL_STD_RX_RDY_INT,
+ .flags.stat_tx_rdy = STAT_STD_TX_RDY,
+ .flags.stat_rx_rdy = STAT_STD_RX_RDY,
+};
+
/* Match table for of_platform binding */
static const struct of_device_id mvebu_uart_of_match[] = {
- { .compatible = "marvell,armada-3700-uart", },
+ {
+ .compatible = "marvell,armada-3700-uart",
+ .data = (void *)&uart_std_driver_data,
+ },
{}
};
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread
* [PATCH v2 06/16] serial: mvebu-uart: add soft reset at probe
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Allen Yan,
Miquel Raynal
From: Allen Yan <yanwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
The existing UART driver relies on the bootloader to initialize the
port(s). However, the secondary uart port may not be initialized
properly in early boot stage. This patch adds the UART soft reset when
probing, for all ports.
Signed-off-by: Allen Yan <yanwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
drivers/tty/serial/mvebu-uart.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index 900fe85796d6..e233f464d55a 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -660,6 +660,11 @@ static int mvebu_uart_probe(struct platform_device *pdev)
port->private_data = mvuart;
platform_set_drvdata(pdev, mvuart);
+ /* UART Soft Reset*/
+ writel(CTRL_SOFT_RST, port->membase + UART_CTRL(port));
+ udelay(1);
+ writel(0, port->membase + UART_CTRL(port));
+
ret = uart_add_one_port(&mvebu_uart_driver, port);
if (ret)
return ret;
--
2.11.0
--
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^ permalink raw reply related [flat|nested] 58+ messages in thread
* [PATCH v2 06/16] serial: mvebu-uart: add soft reset at probe
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
From: Allen Yan <yanwei@marvell.com>
The existing UART driver relies on the bootloader to initialize the
port(s). However, the secondary uart port may not be initialized
properly in early boot stage. This patch adds the UART soft reset when
probing, for all ports.
Signed-off-by: Allen Yan <yanwei@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/tty/serial/mvebu-uart.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index 900fe85796d6..e233f464d55a 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -660,6 +660,11 @@ static int mvebu_uart_probe(struct platform_device *pdev)
port->private_data = mvuart;
platform_set_drvdata(pdev, mvuart);
+ /* UART Soft Reset*/
+ writel(CTRL_SOFT_RST, port->membase + UART_CTRL(port));
+ udelay(1);
+ writel(0, port->membase + UART_CTRL(port));
+
ret = uart_add_one_port(&mvebu_uart_driver, port);
if (ret)
return ret;
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread
* [PATCH v2 08/16] serial: mvebu-uart: clear state register before IRQ request
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Allen Yan,
Miquel Raynal
From: Allen Yan <yanwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
When receiving data on RX pin before ->uart_startup() is called, some
error bits in the state register could be set up (like BRK_DET).
This is harmless when using only the standard UART (error bits are
read-only), but may procude an endless loop once in the extended UART
RX interrupt handler (error bits must be cleared).
Clear the status register in ->uart_startup() to avoid this situation.
Signed-off-by: Allen Yan <yanwei-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
drivers/tty/serial/mvebu-uart.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index 5767196ec0a9..6bd0c40008bb 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -322,6 +322,12 @@ static int mvebu_uart_startup(struct uart_port *port)
writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
port->membase + UART_CTRL(port));
udelay(1);
+
+ /* Clear the error bits of state register before IRQ request */
+ ret = readl(port->membase + UART_STAT);
+ ret |= STAT_BRK_ERR;
+ writel(ret, port->membase + UART_STAT);
+
writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
ctl = readl(port->membase + UART_INTR(port));
--
2.11.0
--
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^ permalink raw reply related [flat|nested] 58+ messages in thread
* [PATCH v2 08/16] serial: mvebu-uart: clear state register before IRQ request
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
From: Allen Yan <yanwei@marvell.com>
When receiving data on RX pin before ->uart_startup() is called, some
error bits in the state register could be set up (like BRK_DET).
This is harmless when using only the standard UART (error bits are
read-only), but may procude an endless loop once in the extended UART
RX interrupt handler (error bits must be cleared).
Clear the status register in ->uart_startup() to avoid this situation.
Signed-off-by: Allen Yan <yanwei@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/tty/serial/mvebu-uart.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index 5767196ec0a9..6bd0c40008bb 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -322,6 +322,12 @@ static int mvebu_uart_startup(struct uart_port *port)
writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
port->membase + UART_CTRL(port));
udelay(1);
+
+ /* Clear the error bits of state register before IRQ request */
+ ret = readl(port->membase + UART_STAT);
+ ret |= STAT_BRK_ERR;
+ writel(ret, port->membase + UART_STAT);
+
writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
ctl = readl(port->membase + UART_INTR(port));
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread
* [PATCH v2 12/16] serial: mvebu-uart: support extended port registers layout
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
Define the missing register offsets and bit fields for the extended
UART port. Add a second driver data structure filled with its port data,
selected with the right compatible (marvell,armada-3700-uart-ext).
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Reviewed-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
drivers/tty/serial/mvebu-uart.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index 1074054ee5be..16b0a5aa14e2 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -39,10 +39,13 @@
/* Register Map */
#define UART_STD_RBR 0x00
+#define UART_EXT_RBR 0x18
#define UART_STD_TSH 0x04
+#define UART_EXT_TSH 0x1C
#define UART_STD_CTRL1 0x08
+#define UART_EXT_CTRL1 0x04
#define CTRL_SOFT_RST BIT(31)
#define CTRL_TXFIFO_RST BIT(15)
#define CTRL_RXFIFO_RST BIT(14)
@@ -55,15 +58,20 @@
CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
#define UART_STD_CTRL2 UART_STD_CTRL1
+#define UART_EXT_CTRL2 0x20
#define CTRL_STD_TX_RDY_INT BIT(5)
+#define CTRL_EXT_TX_RDY_INT BIT(6)
#define CTRL_STD_RX_RDY_INT BIT(4)
+#define CTRL_EXT_RX_RDY_INT BIT(5)
#define UART_STAT 0x0C
#define STAT_TX_FIFO_EMP BIT(13)
#define STAT_TX_FIFO_FUL BIT(11)
#define STAT_TX_EMP BIT(6)
#define STAT_STD_TX_RDY BIT(5)
+#define STAT_EXT_TX_RDY BIT(15)
#define STAT_STD_RX_RDY BIT(4)
+#define STAT_EXT_RX_RDY BIT(14)
#define STAT_BRK_DET BIT(3)
#define STAT_FRM_ERR BIT(2)
#define STAT_PAR_ERR BIT(1)
@@ -865,12 +873,28 @@ static struct mvebu_uart_driver_data uart_std_driver_data = {
.flags.stat_rx_rdy = STAT_STD_RX_RDY,
};
+static struct mvebu_uart_driver_data uart_ext_driver_data = {
+ .is_ext = true,
+ .regs.rbr = UART_EXT_RBR,
+ .regs.tsh = UART_EXT_TSH,
+ .regs.ctrl = UART_EXT_CTRL1,
+ .regs.intr = UART_EXT_CTRL2,
+ .flags.ctrl_tx_rdy_int = CTRL_EXT_TX_RDY_INT,
+ .flags.ctrl_rx_rdy_int = CTRL_EXT_RX_RDY_INT,
+ .flags.stat_tx_rdy = STAT_EXT_TX_RDY,
+ .flags.stat_rx_rdy = STAT_EXT_RX_RDY,
+};
+
/* Match table for of_platform binding */
static const struct of_device_id mvebu_uart_of_match[] = {
{
.compatible = "marvell,armada-3700-uart",
.data = (void *)&uart_std_driver_data,
},
+ {
+ .compatible = "marvell,armada-3700-uart-ext",
+ .data = (void *)&uart_ext_driver_data,
+ },
{}
};
--
2.11.0
--
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^ permalink raw reply related [flat|nested] 58+ messages in thread* [PATCH v2 12/16] serial: mvebu-uart: support extended port registers layout
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
Define the missing register offsets and bit fields for the extended
UART port. Add a second driver data structure filled with its port data,
selected with the right compatible (marvell,armada-3700-uart-ext).
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
drivers/tty/serial/mvebu-uart.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
index 1074054ee5be..16b0a5aa14e2 100644
--- a/drivers/tty/serial/mvebu-uart.c
+++ b/drivers/tty/serial/mvebu-uart.c
@@ -39,10 +39,13 @@
/* Register Map */
#define UART_STD_RBR 0x00
+#define UART_EXT_RBR 0x18
#define UART_STD_TSH 0x04
+#define UART_EXT_TSH 0x1C
#define UART_STD_CTRL1 0x08
+#define UART_EXT_CTRL1 0x04
#define CTRL_SOFT_RST BIT(31)
#define CTRL_TXFIFO_RST BIT(15)
#define CTRL_RXFIFO_RST BIT(14)
@@ -55,15 +58,20 @@
CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
#define UART_STD_CTRL2 UART_STD_CTRL1
+#define UART_EXT_CTRL2 0x20
#define CTRL_STD_TX_RDY_INT BIT(5)
+#define CTRL_EXT_TX_RDY_INT BIT(6)
#define CTRL_STD_RX_RDY_INT BIT(4)
+#define CTRL_EXT_RX_RDY_INT BIT(5)
#define UART_STAT 0x0C
#define STAT_TX_FIFO_EMP BIT(13)
#define STAT_TX_FIFO_FUL BIT(11)
#define STAT_TX_EMP BIT(6)
#define STAT_STD_TX_RDY BIT(5)
+#define STAT_EXT_TX_RDY BIT(15)
#define STAT_STD_RX_RDY BIT(4)
+#define STAT_EXT_RX_RDY BIT(14)
#define STAT_BRK_DET BIT(3)
#define STAT_FRM_ERR BIT(2)
#define STAT_PAR_ERR BIT(1)
@@ -865,12 +873,28 @@ static struct mvebu_uart_driver_data uart_std_driver_data = {
.flags.stat_rx_rdy = STAT_STD_RX_RDY,
};
+static struct mvebu_uart_driver_data uart_ext_driver_data = {
+ .is_ext = true,
+ .regs.rbr = UART_EXT_RBR,
+ .regs.tsh = UART_EXT_TSH,
+ .regs.ctrl = UART_EXT_CTRL1,
+ .regs.intr = UART_EXT_CTRL2,
+ .flags.ctrl_tx_rdy_int = CTRL_EXT_TX_RDY_INT,
+ .flags.ctrl_rx_rdy_int = CTRL_EXT_RX_RDY_INT,
+ .flags.stat_tx_rdy = STAT_EXT_TX_RDY,
+ .flags.stat_rx_rdy = STAT_EXT_RX_RDY,
+};
+
/* Match table for of_platform binding */
static const struct of_device_id mvebu_uart_of_match[] = {
{
.compatible = "marvell,armada-3700-uart",
.data = (void *)&uart_std_driver_data,
},
+ {
+ .compatible = "marvell,armada-3700-uart-ext",
+ .data = (void *)&uart_ext_driver_data,
+ },
{}
};
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread
* [PATCH v2 14/16] arm64: dts: marvell: armada-37xx: add second UART port
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
Add a node in Armada 37xx DTSI file for the second UART, with a
different compatible due to its extended IP which has some
differences with the first UART already in place.
Make use of this commit to also fully describe the first port and
use the same clear and named interrupt bindings for both ports.
The standard UART (UART0) uses level-interrupts while the extended
UART (UART1) uses edge-triggered interrupts.
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index a36d667f770e..72b68f23c001 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -55,6 +55,7 @@
aliases {
serial0 = &uart0;
+ serial1 = &uart1;
};
cpus {
@@ -136,7 +137,22 @@
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x200>;
clocks = <&xtalclk>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts =
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uart-sum", "uart-tx", "uart-rx";
+ status = "disabled";
+ };
+
+ uart1: serial@12200 {
+ compatible = "marvell,armada-3700-uart-ext";
+ reg = <0x12200 0x30>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uart-tx", "uart-rx";
status = "disabled";
};
--
2.11.0
--
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^ permalink raw reply related [flat|nested] 58+ messages in thread* [PATCH v2 14/16] arm64: dts: marvell: armada-37xx: add second UART port
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
Add a node in Armada 37xx DTSI file for the second UART, with a
different compatible due to its extended IP which has some
differences with the first UART already in place.
Make use of this commit to also fully describe the first port and
use the same clear and named interrupt bindings for both ports.
The standard UART (UART0) uses level-interrupts while the extended
UART (UART1) uses edge-triggered interrupts.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index a36d667f770e..72b68f23c001 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -55,6 +55,7 @@
aliases {
serial0 = &uart0;
+ serial1 = &uart1;
};
cpus {
@@ -136,7 +137,22 @@
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x200>;
clocks = <&xtalclk>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts =
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uart-sum", "uart-tx", "uart-rx";
+ status = "disabled";
+ };
+
+ uart1: serial at 12200 {
+ compatible = "marvell,armada-3700-uart-ext";
+ reg = <0x12200 0x30>;
+ clocks = <&xtalclk>;
+ interrupts =
+ <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uart-tx", "uart-rx";
status = "disabled";
};
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread[parent not found: <20171013090200.31034-15-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>]
* Re: [PATCH v2 14/16] arm64: dts: marvell: armada-37xx: add second UART port
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-30 15:45 ` Gregory CLEMENT
-1 siblings, 0 replies; 58+ messages in thread
From: Gregory CLEMENT @ 2017-10-30 15:45 UTC (permalink / raw)
To: Miquel Raynal
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, Jiri Slaby, Catalin Marinas, Will Deacon,
Thomas Petazzoni, devicetree-u79uwXL29TY76Z2rM5mHXA,
Antoine Tenart, Nadav Haklai, linux-gpio-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA, Wilson Ding,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi Miquel,
On ven., oct. 13 2017, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Add a node in Armada 37xx DTSI file for the second UART, with a
> different compatible due to its extended IP which has some
> differences with the first UART already in place.
>
> Make use of this commit to also fully describe the first port and
> use the same clear and named interrupt bindings for both ports.
>
> The standard UART (UART0) uses level-interrupts while the extended
> UART (UART1) uses edge-triggered interrupts.
>
> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Applied on mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 18 +++++++++++++++++-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index a36d667f770e..72b68f23c001 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -55,6 +55,7 @@
>
> aliases {
> serial0 = &uart0;
> + serial1 = &uart1;
> };
>
> cpus {
> @@ -136,7 +137,22 @@
> compatible = "marvell,armada-3700-uart";
> reg = <0x12000 0x200>;
> clocks = <&xtalclk>;
> - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts =
> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> + status = "disabled";
> + };
> +
> + uart1: serial@12200 {
> + compatible = "marvell,armada-3700-uart-ext";
> + reg = <0x12200 0x30>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "uart-tx", "uart-rx";
> status = "disabled";
> };
>
> --
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
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^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH v2 14/16] arm64: dts: marvell: armada-37xx: add second UART port
@ 2017-10-30 15:45 ` Gregory CLEMENT
0 siblings, 0 replies; 58+ messages in thread
From: Gregory CLEMENT @ 2017-10-30 15:45 UTC (permalink / raw)
To: linux-arm-kernel
Hi Miquel,
On ven., oct. 13 2017, Miquel Raynal <miquel.raynal@free-electrons.com> wrote:
> Add a node in Armada 37xx DTSI file for the second UART, with a
> different compatible due to its extended IP which has some
> differences with the first UART already in place.
>
> Make use of this commit to also fully describe the first port and
> use the same clear and named interrupt bindings for both ports.
>
> The standard UART (UART0) uses level-interrupts while the extended
> UART (UART1) uses edge-triggered interrupts.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Applied on mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 18 +++++++++++++++++-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index a36d667f770e..72b68f23c001 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -55,6 +55,7 @@
>
> aliases {
> serial0 = &uart0;
> + serial1 = &uart1;
> };
>
> cpus {
> @@ -136,7 +137,22 @@
> compatible = "marvell,armada-3700-uart";
> reg = <0x12000 0x200>;
> clocks = <&xtalclk>;
> - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts =
> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uart-sum", "uart-tx", "uart-rx";
> + status = "disabled";
> + };
> +
> + uart1: serial at 12200 {
> + compatible = "marvell,armada-3700-uart-ext";
> + reg = <0x12200 0x30>;
> + clocks = <&xtalclk>;
> + interrupts =
> + <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "uart-tx", "uart-rx";
> status = "disabled";
> };
>
> --
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 58+ messages in thread
* [PATCH v2 15/16] arm64: dts: marvell: armada-3720-db: enable second UART port
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-13 9:01 ` Miquel Raynal
-1 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Gregory Clement, Sebastian Hesselbarth, Jiri Slaby,
Catalin Marinas, Will Deacon
Cc: linux-serial-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-gpio-u79uwXL29TY76Z2rM5mHXA, Thomas Petazzoni,
Antoine Tenart, Nadav Haklai, Wilson Ding, Miquel Raynal
Enable Armada-3720-DB second UART port by adding the corresponding
device tree node in the board DTS and enabling it.
Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 9df0f06ce607..15713c19b3d0 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -216,7 +216,7 @@
/*
* Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
- * an FTDI
+ * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
*/
&uart0 {
pinctrl-names = "default";
@@ -224,6 +224,13 @@
status = "okay";
};
+/* CON26(V2.0)/CON28(V1.4) */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
/* CON27(V2.0)/CON29(V1.4) */
&usb2 {
status = "okay";
--
2.11.0
--
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^ permalink raw reply related [flat|nested] 58+ messages in thread* [PATCH v2 15/16] arm64: dts: marvell: armada-3720-db: enable second UART port
@ 2017-10-13 9:01 ` Miquel Raynal
0 siblings, 0 replies; 58+ messages in thread
From: Miquel Raynal @ 2017-10-13 9:01 UTC (permalink / raw)
To: linux-arm-kernel
Enable Armada-3720-DB second UART port by adding the corresponding
device tree node in the board DTS and enabling it.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 9df0f06ce607..15713c19b3d0 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -216,7 +216,7 @@
/*
* Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
- * an FTDI
+ * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
*/
&uart0 {
pinctrl-names = "default";
@@ -224,6 +224,13 @@
status = "okay";
};
+/* CON26(V2.0)/CON28(V1.4) */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "okay";
+};
+
/* CON27(V2.0)/CON29(V1.4) */
&usb2 {
status = "okay";
--
2.11.0
^ permalink raw reply related [flat|nested] 58+ messages in thread[parent not found: <20171013090200.31034-16-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>]
* Re: [PATCH v2 15/16] arm64: dts: marvell: armada-3720-db: enable second UART port
2017-10-13 9:01 ` Miquel Raynal
@ 2017-10-30 15:46 ` Gregory CLEMENT
-1 siblings, 0 replies; 58+ messages in thread
From: Gregory CLEMENT @ 2017-10-30 15:46 UTC (permalink / raw)
To: Miquel Raynal
Cc: Greg Kroah-Hartman, Linus Walleij, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, Jiri Slaby, Catalin Marinas, Will Deacon,
Thomas Petazzoni, devicetree-u79uwXL29TY76Z2rM5mHXA,
Antoine Tenart, Nadav Haklai, linux-gpio-u79uwXL29TY76Z2rM5mHXA,
linux-serial-u79uwXL29TY76Z2rM5mHXA, Wilson Ding,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Hi Miquel,
On ven., oct. 13 2017, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Enable Armada-3720-DB second UART port by adding the corresponding
> device tree node in the board DTS and enabling it.
>
> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> Acked-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
Applied on mvebu/dt64
Thanks,
Gregory
> arch/arm64/boot/dts/marvell/armada-3720-db.dts | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> index 9df0f06ce607..15713c19b3d0 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> @@ -216,7 +216,7 @@
>
> /*
> * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
> - * an FTDI
> + * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
> */
> &uart0 {
> pinctrl-names = "default";
> @@ -224,6 +224,13 @@
> status = "okay";
> };
>
> +/* CON26(V2.0)/CON28(V1.4) */
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2_pins>;
> + status = "okay";
> +};
> +
> /* CON27(V2.0)/CON29(V1.4) */
> &usb2 {
> status = "okay";
> --
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 58+ messages in thread* [PATCH v2 15/16] arm64: dts: marvell: armada-3720-db: enable second UART port
@ 2017-10-30 15:46 ` Gregory CLEMENT
0 siblings, 0 replies; 58+ messages in thread
From: Gregory CLEMENT @ 2017-10-30 15:46 UTC (permalink / raw)
To: linux-arm-kernel
Hi Miquel,
On ven., oct. 13 2017, Miquel Raynal <miquel.raynal@free-electrons.com> wrote:
> Enable Armada-3720-DB second UART port by adding the corresponding
> device tree node in the board DTS and enabling it.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
Applied on mvebu/dt64
Thanks,
Gregory
> arch/arm64/boot/dts/marvell/armada-3720-db.dts | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> index 9df0f06ce607..15713c19b3d0 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
> @@ -216,7 +216,7 @@
>
> /*
> * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
> - * an FTDI
> + * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
> */
> &uart0 {
> pinctrl-names = "default";
> @@ -224,6 +224,13 @@
> status = "okay";
> };
>
> +/* CON26(V2.0)/CON28(V1.4) */
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2_pins>;
> + status = "okay";
> +};
> +
> /* CON27(V2.0)/CON29(V1.4) */
> &usb2 {
> status = "okay";
> --
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 58+ messages in thread