Re: [PATCH] drm/i915: Setting pch_id for HSW/BDW in virtual environment

From: Jani Nikula <jani.nikula@linux.intel.com>
To: Xiong Zhang <xiong.y.zhang@intel.com>,
	joonas.lahtinen@intel.com, jani.saarinen@intel.com,
	zhiyuan.lv@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Setting pch_id for HSW/BDW in virtual	environment
Date: Thu, 15 Jun 2017 23:47:55 +0300	[thread overview]
Message-ID: <87o9tpvuys.fsf@intel.com> (raw)
In-Reply-To: <1497496305-5364-1-git-send-email-xiong.y.zhang@intel.com>

On Thu, 15 Jun 2017, Xiong Zhang <xiong.y.zhang@intel.com> wrote:
> In a IGD passthrough environment, the real ISA bridge may doesn't exist.
> then pch_id couldn't be correctly gotten from ISA bridge, but pch_id is
> used to identify LPT_H and LPT_LP. Currently i915 treat all LPT pch as
> LPT_H,then errors occur when i915 runs on LPT_LP machines with igd
> passthrough.
>
> This patch set pch_id for HSW/BDW according to IGD type and isn't fully
> correct. But it solves such issue on HSW/BDW ult/ulx machines.
> QA CI system is blocked by this issue for a long time, it's better that
> we could merge it to unblock QA CI system.
>
> We know the root cause is in device model of virtual passthrough, and
> will resolve it in the future with several parts cooperation in kernel,
> qemu and xen.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938
>
> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>

Please always indicate when you're sending a new version of a patch. For
example, there's plenty of old discussion in the thread starting at [1].

BR,
Jani.

[1] http://mid.mail-archive.com/1490778167-21424-1-git-send-email-xiong.y.zhang@intel.com

> ---
>  drivers/gpu/drm/i915/i915_drv.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 1f802de..2e664c5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -135,6 +135,10 @@ static enum intel_pch intel_virt_detect_pch(struct drm_i915_private *dev_priv)
>  		DRM_DEBUG_KMS("Assuming CouarPoint PCH\n");
>  	} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
>  		ret = PCH_LPT;
> +		if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
> +			dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
> +		else
> +			dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
>  		DRM_DEBUG_KMS("Assuming LynxPoint PCH\n");
>  	} else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
>  		ret = PCH_SPT;

-- 
Jani Nikula, Intel Open Source Technology Center
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