From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Patchwork <patchwork@emeril.freedesktop.org>,
Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: ✗ Ro.CI.BAT: failure for series starting with [1/8] drm/i915: Flush GT idle status upon reset
Date: Wed, 13 Jul 2016 13:25:26 +0300 [thread overview]
Message-ID: <87oa61sull.fsf@intel.com> (raw)
In-Reply-To: <20160713084824.7936.96537@emeril.freedesktop.org>
Patchwork <patchwork@emeril.freedesktop.org> writes:
> == Series Details ==
>
> Series: series starting with [1/8] drm/i915: Flush GT idle status upon reset
> URL : https://patchwork.freedesktop.org/series/9800/
> State : failure
>
> == Summary ==
>
> Series 9800v1 Series without cover letter
> http://patchwork.freedesktop.org/api/1.0/series/9800/revisions/1/mbox
>
> Test gem_sync:
> Subgroup basic-store-each:
> pass -> FAIL (ro-bdw-i7-5600u)
>
Seems to have happened first with nightly 649
-Mika
> ro-bdw-i5-5250u total:237 pass:213 dwarn:1 dfail:0 fail:7 skip:16
> ro-bdw-i7-5557U total:237 pass:213 dwarn:2 dfail:0 fail:7 skip:15
> ro-bdw-i7-5600u total:237 pass:198 dwarn:0 dfail:0 fail:8 skip:31
> ro-bsw-n3050 total:217 pass:172 dwarn:0 dfail:0 fail:2 skip:42
> ro-byt-n2820 total:237 pass:191 dwarn:0 dfail:0 fail:8 skip:38
> ro-hsw-i3-4010u total:237 pass:206 dwarn:0 dfail:0 fail:7 skip:24
> ro-hsw-i7-4770r total:237 pass:206 dwarn:0 dfail:0 fail:7 skip:24
> ro-ilk-i7-620lm total:237 pass:166 dwarn:0 dfail:0 fail:8 skip:63
> ro-ilk1-i5-650 total:232 pass:166 dwarn:0 dfail:0 fail:8 skip:58
> ro-ivb-i7-3770 total:237 pass:197 dwarn:0 dfail:0 fail:7 skip:33
> ro-skl3-i5-6260u total:237 pass:217 dwarn:1 dfail:0 fail:7 skip:12
> ro-snb-i7-2620M total:237 pass:188 dwarn:0 dfail:0 fail:8 skip:41
>
> Results at /archive/results/CI_IGT_test/RO_Patchwork_1480/
>
> 9561f5c drm-intel-nightly: 2016y-07m-12d-15h-14m-43s UTC integration manifest
> 8419e2847 drm/i915: Hide gen6_update_ring_freq()
> 53bd541 drm/i915: Defer enabling rc6 til after we submit the first batch/context
> 0d19866 drm/i915: Remove superfluous powersave work flushing
> 81ce63d drm/i915: Define a separate variable and control for RPS waitboost frequency
> d347718 drm/i915: Move overclocking detection to alongside RPS frequency detection
> 560aadd drm/i915: Perform static RPS frequency setup before userspace
> 57e5573 drm/i915: Preserve current RPS frequency across init
> 7628e53 drm/i915: Flush GT idle status upon reset
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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next prev parent reply other threads:[~2016-07-13 10:26 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-13 8:10 [PATCH 1/8] drm/i915: Flush GT idle status upon reset Chris Wilson
2016-07-13 8:10 ` [PATCH 2/8] drm/i915: Preserve current RPS frequency across init Chris Wilson
2016-07-13 8:10 ` [PATCH 3/8] drm/i915: Perform static RPS frequency setup before userspace Chris Wilson
2016-07-13 8:10 ` [PATCH 4/8] drm/i915: Move overclocking detection to alongside RPS frequency detection Chris Wilson
2016-07-13 8:10 ` [PATCH 5/8] drm/i915: Define a separate variable and control for RPS waitboost frequency Chris Wilson
2016-07-14 10:26 ` Mika Kuoppala
2016-07-13 8:10 ` [PATCH 6/8] drm/i915: Remove superfluous powersave work flushing Chris Wilson
2016-07-13 8:10 ` [PATCH 7/8] drm/i915: Defer enabling rc6 til after we submit the first batch/context Chris Wilson
2016-07-14 13:56 ` Mika Kuoppala
2016-07-14 14:06 ` Chris Wilson
2016-07-13 8:10 ` [PATCH 8/8] drm/i915: Hide gen6_update_ring_freq() Chris Wilson
2016-07-13 8:48 ` ✗ Ro.CI.BAT: failure for series starting with [1/8] drm/i915: Flush GT idle status upon reset Patchwork
2016-07-13 10:25 ` Mika Kuoppala [this message]
2016-07-13 10:30 ` Chris Wilson
2016-07-14 7:53 ` [PATCH 1/8] " Joonas Lahtinen
2016-07-14 7:59 ` Chris Wilson
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