* [PATCH 1/3] drm: Add new DCS commands in the enum list
@ 2016-03-24 10:03 Deepak M
2016-03-24 10:03 ` [PATCH 2/3] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT Deepak M
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Deepak M @ 2016-03-24 10:03 UTC (permalink / raw)
To: intel-gfx; +Cc: Deepak M, David Airlie, Thierry Reding, Daniel Vetter
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Suggested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
include/video/mipi_display.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h
index ddcc8ca..bb8195b 100644
--- a/include/video/mipi_display.h
+++ b/include/video/mipi_display.h
@@ -117,6 +117,14 @@ enum {
MIPI_DCS_GET_SCANLINE = 0x45,
MIPI_DCS_READ_DDB_START = 0xA1,
MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
+ MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52,
+ MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F,
+ MIPI_DCS_GET_POWER_SAVE = 0x56,
+ MIPI_DCS_GET_CONTROL_DISPLAY = 0x54,
+ MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51,
+ MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E,
+ MIPI_DCS_WRITE_POWER_SAVE = 0x55,
+ MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53,
};
/* MIPI DCS pixel formats */
--
1.9.1
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/3] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT 2016-03-24 10:03 [PATCH 1/3] drm: Add new DCS commands in the enum list Deepak M @ 2016-03-24 10:03 ` Deepak M 2016-03-24 14:31 ` Jani Nikula 2016-03-24 10:03 ` [PATCH 3/3] drm/i915: CABC support for backlight control Deepak M ` (2 subsequent siblings) 3 siblings, 1 reply; 8+ messages in thread From: Deepak M @ 2016-03-24 10:03 UTC (permalink / raw) To: intel-gfx; +Cc: Deepak M, Jani Nikula, Yetunde Adebisi, Daniel Vetter For dual link panel scenarios there are new fileds added in the VBT which indicate on which port the PWM cntrl and CABC ON/OFF commands needs to be sent. v2: Moving the comment to intel_dsi.h(Jani) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com> Signed-off-by: Deepak M <m.deepak@intel.com> --- drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++ drivers/gpu/drm/i915/intel_bios.h | 5 ++++- drivers/gpu/drm/i915/intel_dsi.h | 9 +++++++++ 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 083003b..587c06f 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -749,6 +749,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv, return; } + /* + * These fileds are introduced from the VBT version 197 onwards, + * so making sure that these bits are set zero in the pervious + * versions. + */ + if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) { + dev_priv->vbt.dsi.config->dl_cabc_port = 0; + dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0; + } + /* We have mandatory mipi config blocks. Initialize as generic panel */ dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; } diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index ab0ea31..7a89f79 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h @@ -113,7 +113,10 @@ struct mipi_config { u16 dual_link:2; u16 lane_cnt:2; u16 pixel_overlap:3; - u16 rsvd3:9; + u16 rgb_flip:1; + u16 dl_cabc_port:2; + u16 pwm_bkl_ctrl:2; + u16 rsvd3:4; u16 rsvd4; diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index e582ef8..0e758f1 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -78,6 +78,15 @@ struct intel_dsi { u8 escape_clk_div; u8 dual_link; + + /* + * Below field will inform us on which port the panel blk_cntrl + * and CABC ON/OFF commands needs to be sent in case of dual link + * panels + */ + u8 bkl_dcs_ports; + u8 pwm_blk_ctrl; + u8 pixel_overlap; u32 port_bits; u32 bw_timer; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT 2016-03-24 10:03 ` [PATCH 2/3] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT Deepak M @ 2016-03-24 14:31 ` Jani Nikula 0 siblings, 0 replies; 8+ messages in thread From: Jani Nikula @ 2016-03-24 14:31 UTC (permalink / raw) To: intel-gfx; +Cc: Deepak M, Daniel Vetter, Yetunde Adebisi On Thu, 24 Mar 2016, Deepak M <m.deepak@intel.com> wrote: > For dual link panel scenarios there are new fileds added in the > VBT which indicate on which port the PWM cntrl and CABC ON/OFF > commands needs to be sent. > > v2: Moving the comment to intel_dsi.h(Jani) > > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Daniel Vetter <daniel.vetter@intel.com> > Cc: Yetunde Adebisi <yetundex.adebisi@intel.com> > Signed-off-by: Deepak M <m.deepak@intel.com> > --- > drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++ > drivers/gpu/drm/i915/intel_bios.h | 5 ++++- > drivers/gpu/drm/i915/intel_dsi.h | 9 +++++++++ > 3 files changed, 23 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c > index 083003b..587c06f 100644 > --- a/drivers/gpu/drm/i915/intel_bios.c > +++ b/drivers/gpu/drm/i915/intel_bios.c > @@ -749,6 +749,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv, > return; > } > > + /* > + * These fileds are introduced from the VBT version 197 onwards, > + * so making sure that these bits are set zero in the pervious > + * versions. > + */ *fields* and *previous*. > + if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) { > + dev_priv->vbt.dsi.config->dl_cabc_port = 0; > + dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0; > + } > + > /* We have mandatory mipi config blocks. Initialize as generic panel */ > dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; > } > diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h > index ab0ea31..7a89f79 100644 > --- a/drivers/gpu/drm/i915/intel_bios.h > +++ b/drivers/gpu/drm/i915/intel_bios.h > @@ -113,7 +113,10 @@ struct mipi_config { > u16 dual_link:2; > u16 lane_cnt:2; > u16 pixel_overlap:3; > - u16 rsvd3:9; > + u16 rgb_flip:1; > + u16 dl_cabc_port:2; > + u16 pwm_bkl_ctrl:2; Dunno, how about "dual_link_cabc_ports" and "dual_link_pwm_ports" or something? These two are closely related, why do you name them so different and difficult? > + u16 rsvd3:4; > > u16 rsvd4; > > diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h > index e582ef8..0e758f1 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.h > +++ b/drivers/gpu/drm/i915/intel_dsi.h > @@ -78,6 +78,15 @@ struct intel_dsi { > > u8 escape_clk_div; > u8 dual_link; > + > + /* > + * Below field will inform us on which port the panel blk_cntrl > + * and CABC ON/OFF commands needs to be sent in case of dual link > + * panels > + */ It's actually not clear to me from the VBT spec which DCS commands should use which ports. What are "Panel PWM Bklt Controller On/OFF commands"? What are "CABC On/OFF commands"? > + u8 bkl_dcs_ports; > + u8 pwm_blk_ctrl; You don't actually set or use this field for anything. > + > u8 pixel_overlap; > u32 port_bits; > u32 bw_timer; -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/3] drm/i915: CABC support for backlight control 2016-03-24 10:03 [PATCH 1/3] drm: Add new DCS commands in the enum list Deepak M 2016-03-24 10:03 ` [PATCH 2/3] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT Deepak M @ 2016-03-24 10:03 ` Deepak M 2016-03-24 14:55 ` Jani Nikula 2016-03-24 10:34 ` Jani Nikula 2016-03-24 11:07 ` ✓ Fi.CI.BAT: success for series starting with [1/3] " Patchwork 3 siblings, 1 reply; 8+ messages in thread From: Deepak M @ 2016-03-24 10:03 UTC (permalink / raw) To: intel-gfx; +Cc: Deepak M, Jani Nikula, Yetunde Adebisi, Daniel Vetter In CABC (Content Adaptive Brightness Control) content grey level scale can be increased while simultaneously decreasing brightness of the backlight to achieve same perceived brightness. The CABC is not standardized and panel vendors are free to follow their implementation. The CABC implementaion here assumes that the panels use standard SW register for control. In this design there will be no PWM signal from the SoC and DCS commands are sent to enable and control the backlight brightness. v2: Moving the CABC bkl functions to new file.(Jani) v3: Rebase v4: Rebase v5: Use mipi_dsi_dcs_write() instead of mipi_dsi_dcs_write_buffer() (Jani) Move DCS macro`s to include/video/mipi_display.h (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com> Signed-off-by: Deepak M <m.deepak@intel.com> --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_dsi.c | 19 ++++- drivers/gpu/drm/i915/intel_dsi.h | 4 + drivers/gpu/drm/i915/intel_dsi_cabc.c | 154 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_panel.c | 4 + 7 files changed, 182 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 7ffb51b..065c410 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -83,6 +83,7 @@ i915-y += dvo_ch7017.o \ intel_dp_mst.o \ intel_dp.o \ intel_dsi.o \ + intel_dsi_cabc.o \ intel_dsi_panel_vbt.o \ intel_dsi_pll.o \ intel_dvo.o \ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 050d860..9ed60f8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3489,7 +3489,6 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value, enum intel_sbi_destination destination); u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg); void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val); - int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index c87b450..9e49396 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1325,6 +1325,8 @@ void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); /* intel_dsi.c */ void intel_dsi_init(struct drm_device *dev); +/* intel_dsi_cabc.c */ +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector); /* intel_dvo.c */ void intel_dvo_init(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 456676c..7aa707f 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -1209,10 +1209,25 @@ void intel_dsi_init(struct drm_device *dev) else intel_encoder->crtc_mask = BIT(PIPE_B); - if (dev_priv->vbt.dsi.config->dual_link) + if (dev_priv->vbt.dsi.config->dual_link) { intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C); - else + switch (dev_priv->vbt.dsi.config->dl_cabc_port) { + case CABC_PORT_A: + intel_dsi->bkl_dcs_ports = BIT(PORT_A); + break; + case CABC_PORT_C: + intel_dsi->bkl_dcs_ports = BIT(PORT_C); + break; + case CABC_PORT_A_AND_C: + intel_dsi->bkl_dcs_ports = BIT(PORT_A) | BIT(PORT_C); + break; + default: + DRM_ERROR("Unknown MIPI ports for sending DCS\n"); + } + } else { intel_dsi->ports = BIT(port); + intel_dsi->bkl_dcs_ports = BIT(port); + } /* Create a DSI host (and a device) for each port. */ for_each_dsi_port(port, intel_dsi->ports) { diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index 0e758f1..5c07d59 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -34,6 +34,10 @@ #define DSI_DUAL_LINK_FRONT_BACK 1 #define DSI_DUAL_LINK_PIXEL_ALT 2 +#define CABC_PORT_A 0x00 +#define CABC_PORT_C 0x01 +#define CABC_PORT_A_AND_C 0x02 + struct intel_dsi_host; struct intel_dsi { diff --git a/drivers/gpu/drm/i915/intel_dsi_cabc.c b/drivers/gpu/drm/i915/intel_dsi_cabc.c new file mode 100644 index 0000000..230ee4f --- /dev/null +++ b/drivers/gpu/drm/i915/intel_dsi_cabc.c @@ -0,0 +1,154 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Author: Deepak M <m.deepak at intel.com> + */ + +#include "intel_drv.h" +#include "intel_dsi.h" +#include "i915_drv.h" +#include <video/mipi_display.h> +#include <drm/drm_mipi_dsi.h> + +#define CABC_OFF (0 << 0) +#define CABC_USER_INTERFACE_IMAGE (1 << 0) +#define CABC_STILL_PICTURE (2 << 0) +#define CABC_VIDEO_MODE (3 << 0) + +#define CABC_BACKLIGHT (1 << 2) +#define CABC_DIMMING_DISPLAY (1 << 3) +#define CABC_BCTRL (1 << 5) + +#define CABC_MAX_VALUE 0xFF + +static u32 cabc_get_backlight(struct intel_connector *connector) +{ + struct intel_encoder *encoder = connector->encoder; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + struct mipi_dsi_device *dsi_device; + u8 data[2] = {0}; + enum port port; + + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { + dsi_device = intel_dsi->dsi_hosts[port]->device; + mipi_dsi_dcs_read(dsi_device, MIPI_DCS_GET_DISPLAY_BRIGHTNESS, + data, 2); + } + + return data[1]; +} + +static void cabc_set_backlight(struct intel_connector *connector, u32 level) +{ + struct intel_encoder *encoder = connector->encoder; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + struct mipi_dsi_device *dsi_device; + u8 data = 0; + enum port port; + + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { + dsi_device = intel_dsi->dsi_hosts[port]->device; + data = level; + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, + &data, sizeof(data)); + } +} + +static void cabc_disable_backlight(struct intel_connector *connector) +{ + struct intel_encoder *encoder = connector->encoder; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + struct mipi_dsi_device *dsi_device; + enum port port; + u8 data = 0; + + cabc_set_backlight(connector, 0); + + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { + dsi_device = intel_dsi->dsi_hosts[port]->device; + data = CABC_OFF; + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE, + &data, sizeof(data)); + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY, + &data, sizeof(data)); + } +} + +static void cabc_enable_backlight(struct intel_connector *connector) +{ + struct intel_encoder *encoder = connector->encoder; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + struct intel_panel *panel = &connector->panel; + struct mipi_dsi_device *dsi_device; + enum port port; + u8 data = 0; + + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { + dsi_device = intel_dsi->dsi_hosts[port]->device; + data = CABC_BACKLIGHT | CABC_DIMMING_DISPLAY | CABC_BCTRL; + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY, + &data, sizeof(data)); + data = CABC_STILL_PICTURE; + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE, + &data, sizeof(data)); + } + + cabc_set_backlight(connector, panel->backlight.level); +} + +static int cabc_setup_backlight(struct intel_connector *connector, + enum pipe unused) +{ + struct intel_panel *panel = &connector->panel; + + panel->backlight.max = CABC_MAX_VALUE; + panel->backlight.level = CABC_MAX_VALUE; + + return 0; +} + +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector) +{ + struct drm_device *dev = intel_connector->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct intel_encoder *encoder = intel_connector->encoder; + struct intel_panel *panel = &intel_connector->panel; + + if (!dev_priv->vbt.dsi.config->cabc_supported) + return -ENODEV; + + if (encoder->type != INTEL_OUTPUT_DSI) { + DRM_ERROR("Use DSI encoder for CABC\n"); + return -EINVAL; + } + + if (WARN_ON(encoder->type != INTEL_OUTPUT_DSI)) + return -EINVAL; + + panel->backlight.setup = cabc_setup_backlight; + panel->backlight.enable = cabc_enable_backlight; + panel->backlight.disable = cabc_disable_backlight; + panel->backlight.set = cabc_set_backlight; + panel->backlight.get = cabc_get_backlight; + + return 0; +} diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 8c8996f..641c38f 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel) container_of(panel, struct intel_connector, panel); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && + intel_dsi_cabc_init_backlight_funcs(connector) == 0) + return; + if (IS_BROXTON(dev_priv)) { panel->backlight.setup = bxt_setup_backlight; panel->backlight.enable = bxt_enable_backlight; -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] drm/i915: CABC support for backlight control 2016-03-24 10:03 ` [PATCH 3/3] drm/i915: CABC support for backlight control Deepak M @ 2016-03-24 14:55 ` Jani Nikula 0 siblings, 0 replies; 8+ messages in thread From: Jani Nikula @ 2016-03-24 14:55 UTC (permalink / raw) To: intel-gfx; +Cc: Deepak M, Daniel Vetter, Yetunde Adebisi On Thu, 24 Mar 2016, Deepak M <m.deepak@intel.com> wrote: > In CABC (Content Adaptive Brightness Control) content grey level > scale can be increased while simultaneously decreasing > brightness of the backlight to achieve same perceived brightness. > > The CABC is not standardized and panel vendors are free to follow > their implementation. The CABC implementaion here assumes that the > panels use standard SW register for control. > > In this design there will be no PWM signal from the SoC and DCS > commands are sent to enable and control the backlight brightness. > > v2: Moving the CABC bkl functions to new file.(Jani) > > v3: Rebase > > v4: Rebase > > v5: Use mipi_dsi_dcs_write() instead of mipi_dsi_dcs_write_buffer() (Jani) > Move DCS macro`s to include/video/mipi_display.h (Jani) > > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Daniel Vetter <daniel.vetter@intel.com> > Cc: Yetunde Adebisi <yetundex.adebisi@intel.com> > Signed-off-by: Deepak M <m.deepak@intel.com> > --- > drivers/gpu/drm/i915/Makefile | 1 + > drivers/gpu/drm/i915/i915_drv.h | 1 - > drivers/gpu/drm/i915/intel_drv.h | 2 + > drivers/gpu/drm/i915/intel_dsi.c | 19 ++++- > drivers/gpu/drm/i915/intel_dsi.h | 4 + > drivers/gpu/drm/i915/intel_dsi_cabc.c | 154 ++++++++++++++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_panel.c | 4 + > 7 files changed, 182 insertions(+), 3 deletions(-) > create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c > > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile > index 7ffb51b..065c410 100644 > --- a/drivers/gpu/drm/i915/Makefile > +++ b/drivers/gpu/drm/i915/Makefile > @@ -83,6 +83,7 @@ i915-y += dvo_ch7017.o \ > intel_dp_mst.o \ > intel_dp.o \ > intel_dsi.o \ > + intel_dsi_cabc.o \ > intel_dsi_panel_vbt.o \ > intel_dsi_pll.o \ > intel_dvo.o \ > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 050d860..9ed60f8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -3489,7 +3489,6 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value, > enum intel_sbi_destination destination); > u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg); > void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val); > - Superfluous whitepace change. > int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); > int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index c87b450..9e49396 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1325,6 +1325,8 @@ void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port); > /* intel_dsi.c */ > void intel_dsi_init(struct drm_device *dev); > > +/* intel_dsi_cabc.c */ > +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector); > > /* intel_dvo.c */ > void intel_dvo_init(struct drm_device *dev); > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > index 456676c..7aa707f 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -1209,10 +1209,25 @@ void intel_dsi_init(struct drm_device *dev) > else > intel_encoder->crtc_mask = BIT(PIPE_B); > > - if (dev_priv->vbt.dsi.config->dual_link) > + if (dev_priv->vbt.dsi.config->dual_link) { > intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C); > - else > + switch (dev_priv->vbt.dsi.config->dl_cabc_port) { > + case CABC_PORT_A: > + intel_dsi->bkl_dcs_ports = BIT(PORT_A); > + break; > + case CABC_PORT_C: > + intel_dsi->bkl_dcs_ports = BIT(PORT_C); > + break; > + case CABC_PORT_A_AND_C: > + intel_dsi->bkl_dcs_ports = BIT(PORT_A) | BIT(PORT_C); > + break; > + default: > + DRM_ERROR("Unknown MIPI ports for sending DCS\n"); Is it a good idea to leave the field uninitialized in this case? Maybe go for both ports? > + } > + } else { > intel_dsi->ports = BIT(port); > + intel_dsi->bkl_dcs_ports = BIT(port); > + } > > /* Create a DSI host (and a device) for each port. */ > for_each_dsi_port(port, intel_dsi->ports) { > diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h > index 0e758f1..5c07d59 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.h > +++ b/drivers/gpu/drm/i915/intel_dsi.h > @@ -34,6 +34,10 @@ > #define DSI_DUAL_LINK_FRONT_BACK 1 > #define DSI_DUAL_LINK_PIXEL_ALT 2 > > +#define CABC_PORT_A 0x00 > +#define CABC_PORT_C 0x01 > +#define CABC_PORT_A_AND_C 0x02 > + > struct intel_dsi_host; > > struct intel_dsi { > diff --git a/drivers/gpu/drm/i915/intel_dsi_cabc.c b/drivers/gpu/drm/i915/intel_dsi_cabc.c > new file mode 100644 > index 0000000..230ee4f > --- /dev/null > +++ b/drivers/gpu/drm/i915/intel_dsi_cabc.c > @@ -0,0 +1,154 @@ > +/* > + * Copyright © 2016 Intel Corporation > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > + * copy of this software and associated documentation files (the "Software"), > + * to deal in the Software without restriction, including without limitation > + * the rights to use, copy, modify, merge, publish, distribute, sublicense, > + * and/or sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice (including the next > + * paragraph) shall be included in all copies or substantial portions of the > + * Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER > + * DEALINGS IN THE SOFTWARE. > + * > + * Author: Deepak M <m.deepak at intel.com> > + */ > + > +#include "intel_drv.h" > +#include "intel_dsi.h" > +#include "i915_drv.h" > +#include <video/mipi_display.h> > +#include <drm/drm_mipi_dsi.h> > + > +#define CABC_OFF (0 << 0) > +#define CABC_USER_INTERFACE_IMAGE (1 << 0) > +#define CABC_STILL_PICTURE (2 << 0) > +#define CABC_VIDEO_MODE (3 << 0) > + > +#define CABC_BACKLIGHT (1 << 2) > +#define CABC_DIMMING_DISPLAY (1 << 3) > +#define CABC_BCTRL (1 << 5) > + > +#define CABC_MAX_VALUE 0xFF > + > +static u32 cabc_get_backlight(struct intel_connector *connector) > +{ > + struct intel_encoder *encoder = connector->encoder; > + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > + struct mipi_dsi_device *dsi_device; > + u8 data[2] = {0}; > + enum port port; > + > + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { So, it seems weird to do the brightness read on both ports, and overwrite the result on the second round. Do you have any further info on this? VBT only refers to "Panel PWM Bklt Controller On/OFF commands" and "CABC On/OFF commands". I don't know what should be done with brightness commands in dual link case. > + dsi_device = intel_dsi->dsi_hosts[port]->device; > + mipi_dsi_dcs_read(dsi_device, MIPI_DCS_GET_DISPLAY_BRIGHTNESS, > + data, 2); > + } > + > + return data[1]; So the spec says, "Only one parameter is returned for devices that support 8-bit brightness levels. Two parameters are returned for devices that support between 9-bit and 16-bit brightness levels." That's an annoying spec, but your implementation seems wrong for both 8-bit and 16-bit brightness. With the former, you'll only get one byte, and you'll return the 0-initialized second byte. With the latter, you'll get two bytes, but you'll return the least significant byte. If, for starters, we assume 8-bit brightness, I think you should just read one byte. (Given the spec, and depending on the hw implementation, this might just work for 16-bit panes as well by way of reading/writing the MSB.) > +} > + > +static void cabc_set_backlight(struct intel_connector *connector, u32 level) > +{ > + struct intel_encoder *encoder = connector->encoder; > + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > + struct mipi_dsi_device *dsi_device; > + u8 data = 0; No need to initialize this. > + enum port port; > + > + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { > + dsi_device = intel_dsi->dsi_hosts[port]->device; > + data = level; > + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, > + &data, sizeof(data)); > + } This seems right for 8-bit brightness. I'm still clueless which ports this command should be sent to though. > +} > + > +static void cabc_disable_backlight(struct intel_connector *connector) > +{ > + struct intel_encoder *encoder = connector->encoder; > + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > + struct mipi_dsi_device *dsi_device; > + enum port port; > + u8 data = 0; No need to initialize this. > + > + cabc_set_backlight(connector, 0); > + > + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { > + dsi_device = intel_dsi->dsi_hosts[port]->device; > + data = CABC_OFF; > + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE, > + &data, sizeof(data)); > + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY, > + &data, sizeof(data)); Here, it seems to me MIPI_DCS_WRITE_POWER_SAVE is a "CABC On/OFF command" while MIPI_DCS_WRITE_CONTROL_DISPLAY is a "Panel PWM Bklt Controller On/OFF command", but I'm just guessing. > + } > +} > + > +static void cabc_enable_backlight(struct intel_connector *connector) > +{ > + struct intel_encoder *encoder = connector->encoder; > + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > + struct intel_panel *panel = &connector->panel; > + struct mipi_dsi_device *dsi_device; > + enum port port; > + u8 data = 0; No need to initialize this. > + > + for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) { > + dsi_device = intel_dsi->dsi_hosts[port]->device; > + data = CABC_BACKLIGHT | CABC_DIMMING_DISPLAY | CABC_BCTRL; > + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY, > + &data, sizeof(data)); > + data = CABC_STILL_PICTURE; > + mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE, > + &data, sizeof(data)); Same here as above wrt ports. > + } > + > + cabc_set_backlight(connector, panel->backlight.level); > +} > + > +static int cabc_setup_backlight(struct intel_connector *connector, > + enum pipe unused) > +{ > + struct intel_panel *panel = &connector->panel; > + > + panel->backlight.max = CABC_MAX_VALUE; > + panel->backlight.level = CABC_MAX_VALUE; > + > + return 0; > +} > + > +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector) > +{ > + struct drm_device *dev = intel_connector->base.dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > + struct intel_encoder *encoder = intel_connector->encoder; > + struct intel_panel *panel = &intel_connector->panel; > + > + if (!dev_priv->vbt.dsi.config->cabc_supported) > + return -ENODEV; > + > + if (encoder->type != INTEL_OUTPUT_DSI) { > + DRM_ERROR("Use DSI encoder for CABC\n"); > + return -EINVAL; > + } > + > + if (WARN_ON(encoder->type != INTEL_OUTPUT_DSI)) > + return -EINVAL; I meant you should add this *instead* of the one above. They do have the same condition and all... > + > + panel->backlight.setup = cabc_setup_backlight; > + panel->backlight.enable = cabc_enable_backlight; > + panel->backlight.disable = cabc_disable_backlight; > + panel->backlight.set = cabc_set_backlight; > + panel->backlight.get = cabc_get_backlight; > + > + return 0; > +} > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c > index 8c8996f..641c38f 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel) > container_of(panel, struct intel_connector, panel); > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > > + if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && > + intel_dsi_cabc_init_backlight_funcs(connector) == 0) > + return; > + > if (IS_BROXTON(dev_priv)) { > panel->backlight.setup = bxt_setup_backlight; > panel->backlight.enable = bxt_enable_backlight; -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm: Add new DCS commands in the enum list 2016-03-24 10:03 [PATCH 1/3] drm: Add new DCS commands in the enum list Deepak M @ 2016-03-24 10:34 ` Jani Nikula 2016-03-24 10:03 ` [PATCH 3/3] drm/i915: CABC support for backlight control Deepak M ` (2 subsequent siblings) 3 siblings, 0 replies; 8+ messages in thread From: Jani Nikula @ 2016-03-24 10:34 UTC (permalink / raw) To: intel-gfx Cc: linux-fbdev, Deepak M, dri-devel, David Airlie, Tomi Valkeinen, Thierry Reding, Daniel Vetter, Jean-Christophe Plagniol-Villard On Thu, 24 Mar 2016, Deepak M <m.deepak@intel.com> wrote: > Adding new DCS commands which are specified in the > DCS 1.3 spec related to CABC. > > Cc: Thierry Reding <thierry.reding@gmail.com> > Cc: David Airlie <airlied@linux.ie> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Daniel Vetter <daniel.vetter@intel.com> > Suggested-by: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: Deepak M <m.deepak@intel.com> Deepak, for future reference, please use scripts/get_maintainer.pl to see whom you should include for patches touching code outside of i915. The commands added match the MIPI DCS 1.3 spec, Reviewed-by: Jani Nikula <jani.nikula@intel.com> Jean-Christophe, Tomi, may I have your acks for merging this via drm/i915 tree? BR, Jani. > --- > include/video/mipi_display.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h > index ddcc8ca..bb8195b 100644 > --- a/include/video/mipi_display.h > +++ b/include/video/mipi_display.h > @@ -117,6 +117,14 @@ enum { > MIPI_DCS_GET_SCANLINE = 0x45, > MIPI_DCS_READ_DDB_START = 0xA1, > MIPI_DCS_READ_DDB_CONTINUE = 0xA8, > + MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, > + MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, > + MIPI_DCS_GET_POWER_SAVE = 0x56, > + MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, > + MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, > + MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, > + MIPI_DCS_WRITE_POWER_SAVE = 0x55, > + MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, > }; > > /* MIPI DCS pixel formats */ -- Jani Nikula, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] drm: Add new DCS commands in the enum list @ 2016-03-24 10:34 ` Jani Nikula 0 siblings, 0 replies; 8+ messages in thread From: Jani Nikula @ 2016-03-24 10:34 UTC (permalink / raw) To: intel-gfx Cc: linux-fbdev, Deepak M, dri-devel, David Airlie, Tomi Valkeinen, Thierry Reding, Daniel Vetter, Jean-Christophe Plagniol-Villard On Thu, 24 Mar 2016, Deepak M <m.deepak@intel.com> wrote: > Adding new DCS commands which are specified in the > DCS 1.3 spec related to CABC. > > Cc: Thierry Reding <thierry.reding@gmail.com> > Cc: David Airlie <airlied@linux.ie> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Daniel Vetter <daniel.vetter@intel.com> > Suggested-by: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: Deepak M <m.deepak@intel.com> Deepak, for future reference, please use scripts/get_maintainer.pl to see whom you should include for patches touching code outside of i915. The commands added match the MIPI DCS 1.3 spec, Reviewed-by: Jani Nikula <jani.nikula@intel.com> Jean-Christophe, Tomi, may I have your acks for merging this via drm/i915 tree? BR, Jani. > --- > include/video/mipi_display.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h > index ddcc8ca..bb8195b 100644 > --- a/include/video/mipi_display.h > +++ b/include/video/mipi_display.h > @@ -117,6 +117,14 @@ enum { > MIPI_DCS_GET_SCANLINE = 0x45, > MIPI_DCS_READ_DDB_START = 0xA1, > MIPI_DCS_READ_DDB_CONTINUE = 0xA8, > + MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, > + MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, > + MIPI_DCS_GET_POWER_SAVE = 0x56, > + MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, > + MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, > + MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, > + MIPI_DCS_WRITE_POWER_SAVE = 0x55, > + MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, > }; > > /* MIPI DCS pixel formats */ -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/3] drm: Add new DCS commands in the enum list 2016-03-24 10:03 [PATCH 1/3] drm: Add new DCS commands in the enum list Deepak M ` (2 preceding siblings ...) 2016-03-24 10:34 ` Jani Nikula @ 2016-03-24 11:07 ` Patchwork 3 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2016-03-24 11:07 UTC (permalink / raw) To: Deepak M; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm: Add new DCS commands in the enum list URL : https://patchwork.freedesktop.org/series/4849/ State : success == Summary == Series 4849v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/4849/revisions/1/mbox/ Test gem_exec_suspend: Subgroup basic-s3: dmesg-warn -> PASS (bsw-nuc-2) Test kms_pipe_crc_basic: Subgroup read-crc-pipe-c-frame-sequence: pass -> SKIP (bsw-nuc-2) Subgroup suspend-read-crc-pipe-c: incomplete -> PASS (hsw-gt2) bdw-nuci7 total:192 pass:180 dwarn:0 dfail:0 fail:0 skip:12 bdw-ultra total:192 pass:171 dwarn:0 dfail:0 fail:0 skip:21 bsw-nuc-2 total:192 pass:154 dwarn:0 dfail:0 fail:0 skip:38 byt-nuc total:192 pass:156 dwarn:1 dfail:0 fail:0 skip:35 hsw-brixbox total:192 pass:170 dwarn:0 dfail:0 fail:0 skip:22 hsw-gt2 total:192 pass:175 dwarn:0 dfail:0 fail:0 skip:17 ivb-t430s total:192 pass:167 dwarn:0 dfail:0 fail:0 skip:25 skl-i7k-2 total:192 pass:169 dwarn:0 dfail:0 fail:0 skip:23 skl-nuci5 total:192 pass:181 dwarn:0 dfail:0 fail:0 skip:11 snb-dellxps total:192 pass:158 dwarn:0 dfail:0 fail:0 skip:34 snb-x220t total:192 pass:158 dwarn:0 dfail:0 fail:1 skip:33 Results at /archive/results/CI_IGT_test/Patchwork_1702/ 79ee42317266a82b932a39e9567244ed91dd27d6 drm-intel-nightly: 2016y-03m-24d-10h-26m-54s UTC integration manifest d4f53f704b2e53d4c4bab0b0505690cda217b632 drm/i915: CABC support for backlight control db45da17126806341102dc7ce31a295abea44595 drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT ee106190a0ef5a19a18b7a6488d76c04047e1a17 drm: Add new DCS commands in the enum list _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2016-03-24 14:55 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-03-24 10:03 [PATCH 1/3] drm: Add new DCS commands in the enum list Deepak M 2016-03-24 10:03 ` [PATCH 2/3] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT Deepak M 2016-03-24 14:31 ` Jani Nikula 2016-03-24 10:03 ` [PATCH 3/3] drm/i915: CABC support for backlight control Deepak M 2016-03-24 14:55 ` Jani Nikula 2016-03-24 10:34 ` [Intel-gfx] [PATCH 1/3] drm: Add new DCS commands in the enum list Jani Nikula 2016-03-24 10:34 ` Jani Nikula 2016-03-24 11:07 ` ✓ Fi.CI.BAT: success for series starting with [1/3] " Patchwork
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