From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============2394255500386214899==" MIME-Version: 1.0 From: Jani Nikula To: lkp@lists.01.org Subject: Re: [PATCH] drm/i915: disable CPU PWM also on LPT/SPT backlight disable Date: Thu, 08 Oct 2015 16:44:07 +0300 Message-ID: <87oag979w8.fsf@intel.com> In-Reply-To: <87io6tie5w.fsf@intel.com> List-Id: --===============2394255500386214899== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Huang, please try this patch. BR, Jani. On Tue, 29 Sep 2015, Jani Nikula wrote: > Also adding Cc: intel-gfx, please include that in follow-ups. > > Thanks, > Jani. > > On Tue, 29 Sep 2015, Jani Nikula wrote: >> Although we don't support or enable CPU PWM with LPT/SPT based systems, >> it may have been enabled prior to loading the driver. Disable the CPU >> PWM on LPT/SPT backlight disable to avoid warnings on LCPLL disable. >> >> The issue has been present on BDW since BDW enabling, but was recently >> introduced on HSW with >> >> commit 437b15b8017e0d946453c10794b0c5d4591cf180 >> Author: Jani Nikula >> Date: Fri Sep 4 16:55:13 2015 +0300 >> >> drm/i915: use pch backlight override on hsw too >> >> Reference: http://mid.gmane.org/87y4frhwsn.fsf(a)yhuang-dev.intel.com >> Reported-by: kernel test robot >> Signed-off-by: Jani Nikula >> --- >> drivers/gpu/drm/i915/intel_panel.c | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/i= ntel_panel.c >> index dd71e7f139e3..c9c94d05f3dd 100644 >> --- a/drivers/gpu/drm/i915/intel_panel.c >> +++ b/drivers/gpu/drm/i915/intel_panel.c >> @@ -731,6 +731,20 @@ static void lpt_disable_backlight(struct intel_conn= ector *connector) >> = >> intel_panel_actually_set_backlight(connector, 0); >> = >> + /* >> + * Although we don't support or enable CPU PWM with LPT/SPT based >> + * systems, it may have been enabled prior to loading the >> + * driver. Disable to avoid warnings on LCPLL disable. >> + * >> + * This needs rework if we need to add support for CPU PWM on PCH split >> + * platforms. >> + */ >> + tmp =3D I915_READ(BLC_PWM_CPU_CTL2); >> + if (tmp & BLM_PWM_ENABLE) { >> + DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); >> + I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); >> + } >> + >> tmp =3D I915_READ(BLC_PWM_PCH_CTL1); >> I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); >> } >> -- = >> 2.1.4 >> > > -- = > Jani Nikula, Intel Open Source Technology Center -- = Jani Nikula, Intel Open Source Technology Center --===============2394255500386214899==-- From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH] drm/i915: disable CPU PWM also on LPT/SPT backlight disable Date: Thu, 08 Oct 2015 16:44:07 +0300 Message-ID: <87oag979w8.fsf@intel.com> References: <87y4fpmyqi.fsf@yhuang-dev.intel.com> <1443530508-12112-1-git-send-email-jani.nikula@intel.com> <87io6tie5w.fsf@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 4E9986ECD8 for ; Thu, 8 Oct 2015 06:40:45 -0700 (PDT) In-Reply-To: <87io6tie5w.fsf@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Huang Ying Cc: Daniel Vetter , "intel-gfx@lists.freedesktop.org" , LKML , kernel test robot , lkp@01.org List-Id: intel-gfx@lists.freedesktop.org Ckh1YW5nLCBwbGVhc2UgdHJ5IHRoaXMgcGF0Y2guCgpCUiwKSmFuaS4KCgpPbiBUdWUsIDI5IFNl cCAyMDE1LCBKYW5pIE5pa3VsYSA8amFuaS5uaWt1bGFAaW50ZWwuY29tPiB3cm90ZToKPiBBbHNv IGFkZGluZyBDYzogaW50ZWwtZ2Z4LCBwbGVhc2UgaW5jbHVkZSB0aGF0IGluIGZvbGxvdy11cHMu Cj4KPiBUaGFua3MsCj4gSmFuaS4KPgo+IE9uIFR1ZSwgMjkgU2VwIDIwMTUsIEphbmkgTmlrdWxh IDxqYW5pLm5pa3VsYUBpbnRlbC5jb20+IHdyb3RlOgo+PiBBbHRob3VnaCB3ZSBkb24ndCBzdXBw b3J0IG9yIGVuYWJsZSBDUFUgUFdNIHdpdGggTFBUL1NQVCBiYXNlZCBzeXN0ZW1zLAo+PiBpdCBt YXkgaGF2ZSBiZWVuIGVuYWJsZWQgcHJpb3IgdG8gbG9hZGluZyB0aGUgZHJpdmVyLiBEaXNhYmxl IHRoZSBDUFUKPj4gUFdNIG9uIExQVC9TUFQgYmFja2xpZ2h0IGRpc2FibGUgdG8gYXZvaWQgd2Fy bmluZ3Mgb24gTENQTEwgZGlzYWJsZS4KPj4KPj4gVGhlIGlzc3VlIGhhcyBiZWVuIHByZXNlbnQg b24gQkRXIHNpbmNlIEJEVyBlbmFibGluZywgYnV0IHdhcyByZWNlbnRseQo+PiBpbnRyb2R1Y2Vk IG9uIEhTVyB3aXRoCj4+Cj4+IGNvbW1pdCA0MzdiMTViODAxN2UwZDk0NjQ1M2MxMDc5NGIwYzVk NDU5MWNmMTgwCj4+IEF1dGhvcjogSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGludGVsLmNvbT4K Pj4gRGF0ZTogICBGcmkgU2VwIDQgMTY6NTU6MTMgMjAxNSArMDMwMAo+Pgo+PiAgICAgZHJtL2k5 MTU6IHVzZSBwY2ggYmFja2xpZ2h0IG92ZXJyaWRlIG9uIGhzdyB0b28KPj4KPj4gUmVmZXJlbmNl OiBodHRwOi8vbWlkLmdtYW5lLm9yZy84N3k0ZnJod3NuLmZzZkB5aHVhbmctZGV2LmludGVsLmNv bQo+PiBSZXBvcnRlZC1ieToga2VybmVsIHRlc3Qgcm9ib3QgPHlpbmcuaHVhbmdAaW50ZWwuY29t Pgo+PiBTaWduZWQtb2ZmLWJ5OiBKYW5pIE5pa3VsYSA8amFuaS5uaWt1bGFAaW50ZWwuY29tPgo+ PiAtLS0KPj4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3BhbmVsLmMgfCAxNCArKysrKysr KysrKysrKwo+PiAgMSBmaWxlIGNoYW5nZWQsIDE0IGluc2VydGlvbnMoKykKPj4KPj4gZGlmZiAt LWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3BhbmVsLmMgYi9kcml2ZXJzL2dwdS9k cm0vaTkxNS9pbnRlbF9wYW5lbC5jCj4+IGluZGV4IGRkNzFlN2YxMzllMy4uYzljOTRkMDVmM2Rk IDEwMDY0NAo+PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9wYW5lbC5jCj4+ICsr KyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3BhbmVsLmMKPj4gQEAgLTczMSw2ICs3MzEs MjAgQEAgc3RhdGljIHZvaWQgbHB0X2Rpc2FibGVfYmFja2xpZ2h0KHN0cnVjdCBpbnRlbF9jb25u ZWN0b3IgKmNvbm5lY3RvcikKPj4gIAo+PiAgCWludGVsX3BhbmVsX2FjdHVhbGx5X3NldF9iYWNr bGlnaHQoY29ubmVjdG9yLCAwKTsKPj4gIAo+PiArCS8qCj4+ICsJICogQWx0aG91Z2ggd2UgZG9u J3Qgc3VwcG9ydCBvciBlbmFibGUgQ1BVIFBXTSB3aXRoIExQVC9TUFQgYmFzZWQKPj4gKwkgKiBz eXN0ZW1zLCBpdCBtYXkgaGF2ZSBiZWVuIGVuYWJsZWQgcHJpb3IgdG8gbG9hZGluZyB0aGUKPj4g KwkgKiBkcml2ZXIuIERpc2FibGUgdG8gYXZvaWQgd2FybmluZ3Mgb24gTENQTEwgZGlzYWJsZS4K Pj4gKwkgKgo+PiArCSAqIFRoaXMgbmVlZHMgcmV3b3JrIGlmIHdlIG5lZWQgdG8gYWRkIHN1cHBv cnQgZm9yIENQVSBQV00gb24gUENIIHNwbGl0Cj4+ICsJICogcGxhdGZvcm1zLgo+PiArCSAqLwo+ PiArCXRtcCA9IEk5MTVfUkVBRChCTENfUFdNX0NQVV9DVEwyKTsKPj4gKwlpZiAodG1wICYgQkxN X1BXTV9FTkFCTEUpIHsKPj4gKwkJRFJNX0RFQlVHX0tNUygiY3B1IGJhY2tsaWdodCB3YXMgZW5h YmxlZCwgZGlzYWJsaW5nXG4iKTsKPj4gKwkJSTkxNV9XUklURShCTENfUFdNX0NQVV9DVEwyLCB0 bXAgJiB+QkxNX1BXTV9FTkFCTEUpOwo+PiArCX0KPj4gKwo+PiAgCXRtcCA9IEk5MTVfUkVBRChC TENfUFdNX1BDSF9DVEwxKTsKPj4gIAlJOTE1X1dSSVRFKEJMQ19QV01fUENIX0NUTDEsIHRtcCAm IH5CTE1fUENIX1BXTV9FTkFCTEUpOwo+PiAgfQo+PiAtLSAKPj4gMi4xLjQKPj4KPgo+IC0tIAo+ IEphbmkgTmlrdWxhLCBJbnRlbCBPcGVuIFNvdXJjZSBUZWNobm9sb2d5IENlbnRlcgoKLS0gCkph bmkgTmlrdWxhLCBJbnRlbCBPcGVuIFNvdXJjZSBUZWNobm9sb2d5IENlbnRlcgpfX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBs aXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNr dG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757862AbbJHNkr (ORCPT ); Thu, 8 Oct 2015 09:40:47 -0400 Received: from mga11.intel.com ([192.55.52.93]:41833 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757740AbbJHNkp (ORCPT ); Thu, 8 Oct 2015 09:40:45 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,654,1437462000"; d="scan'208";a="822308161" From: Jani Nikula To: Huang Ying Cc: kernel test robot , lkp@01.org, LKML , Clint Taylor , Daniel Vetter , "intel-gfx\@lists.freedesktop.org" Subject: Re: [PATCH] drm/i915: disable CPU PWM also on LPT/SPT backlight disable In-Reply-To: <87io6tie5w.fsf@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <87y4fpmyqi.fsf@yhuang-dev.intel.com> <1443530508-12112-1-git-send-email-jani.nikula@intel.com> <87io6tie5w.fsf@intel.com> User-Agent: Notmuch/0.20.2+101~gb57168b (http://notmuchmail.org) Emacs/24.4.1 (x86_64-pc-linux-gnu) Date: Thu, 08 Oct 2015 16:44:07 +0300 Message-ID: <87oag979w8.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Huang, please try this patch. BR, Jani. On Tue, 29 Sep 2015, Jani Nikula wrote: > Also adding Cc: intel-gfx, please include that in follow-ups. > > Thanks, > Jani. > > On Tue, 29 Sep 2015, Jani Nikula wrote: >> Although we don't support or enable CPU PWM with LPT/SPT based systems, >> it may have been enabled prior to loading the driver. Disable the CPU >> PWM on LPT/SPT backlight disable to avoid warnings on LCPLL disable. >> >> The issue has been present on BDW since BDW enabling, but was recently >> introduced on HSW with >> >> commit 437b15b8017e0d946453c10794b0c5d4591cf180 >> Author: Jani Nikula >> Date: Fri Sep 4 16:55:13 2015 +0300 >> >> drm/i915: use pch backlight override on hsw too >> >> Reference: http://mid.gmane.org/87y4frhwsn.fsf@yhuang-dev.intel.com >> Reported-by: kernel test robot >> Signed-off-by: Jani Nikula >> --- >> drivers/gpu/drm/i915/intel_panel.c | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c >> index dd71e7f139e3..c9c94d05f3dd 100644 >> --- a/drivers/gpu/drm/i915/intel_panel.c >> +++ b/drivers/gpu/drm/i915/intel_panel.c >> @@ -731,6 +731,20 @@ static void lpt_disable_backlight(struct intel_connector *connector) >> >> intel_panel_actually_set_backlight(connector, 0); >> >> + /* >> + * Although we don't support or enable CPU PWM with LPT/SPT based >> + * systems, it may have been enabled prior to loading the >> + * driver. Disable to avoid warnings on LCPLL disable. >> + * >> + * This needs rework if we need to add support for CPU PWM on PCH split >> + * platforms. >> + */ >> + tmp = I915_READ(BLC_PWM_CPU_CTL2); >> + if (tmp & BLM_PWM_ENABLE) { >> + DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); >> + I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); >> + } >> + >> tmp = I915_READ(BLC_PWM_PCH_CTL1); >> I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); >> } >> -- >> 2.1.4 >> > > -- > Jani Nikula, Intel Open Source Technology Center -- Jani Nikula, Intel Open Source Technology Center