From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56815) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W34OW-0000x6-Du for qemu-devel@nongnu.org; Tue, 14 Jan 2014 08:51:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W34OQ-0007Sw-KR for qemu-devel@nongnu.org; Tue, 14 Jan 2014 08:51:04 -0500 Received: from mail-qc0-f175.google.com ([209.85.216.175]:40451) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W34OQ-0007So-Fr for qemu-devel@nongnu.org; Tue, 14 Jan 2014 08:50:58 -0500 Received: by mail-qc0-f175.google.com with SMTP id x13so6668807qcv.34 for ; Tue, 14 Jan 2014 05:50:57 -0800 (PST) From: Mike Day In-Reply-To: <20140112075419.GB22644@redhat.com> References: <1386786509-29966-14-git-send-email-mst@redhat.com> <1389288287.3209.231.camel@bling.home> <20140109180003.GA6819@redhat.com> <1389293278.3209.248.camel@bling.home> <1389294206.3209.249.camel@bling.home> <20140109215632.GB9385@redhat.com> <1389307342.3209.269.camel@bling.home> <20140110125504.GF10700@redhat.com> <1389367896.3209.291.camel@bling.home> <20140112075419.GB22644@redhat.com> Date: Tue, 14 Jan 2014 08:50:54 -0500 Message-ID: <87ob3eaczl.fsf@pixel.localdomain> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Qemu-devel] [PULL 14/28] exec: make address spaces 64-bit wide List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" , Alex Williamson Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org, aik@ozlabs.ru, agraf@suse.de, Luiz Capitulino , Paolo Bonzini , david@gibson.dropbear.id.au "Michael S. Tsirkin" writes: > On Fri, Jan 10, 2014 at 08:31:36AM -0700, Alex Williamson wrote: > Short term, just assume 48 bits on x86. > > We need to figure out what's the limitation on ppc and arm - > maybe there's none and it can address full 64 bit range. > > Cc some people who might know about these platforms. The document you need is here: http://goo.gl/fJYxdN "PCI Bus Binding To: IEEE Std 1275-1994" The short answer is that Power (OpenFirmware-to-PCI) supports both MMIO and Memory mappings for BARs. Also, both 32-bit and 64-bit BARs are required to be supported. It is legal to construct a 64-bit BAR by masking all the high bits to zero. Presumably it would be OK to mask the 16 high bits to zero as well, constructing a 48-bit address. Mike -- Mike Day | "Endurance is a Virtue"