From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH] drm/i915: implement WaMbcDriverBootEnable on Haswell Date: Wed, 31 Oct 2012 14:46:22 +0200 Message-ID: <87objilsgx.fsf@intel.com> References: <1351269290-3910-1-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 244649E935 for ; Wed, 31 Oct 2012 05:40:59 -0700 (PDT) In-Reply-To: <1351269290-3910-1-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni , intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Fri, 26 Oct 2012, Paulo Zanoni wrote: > From: Paulo Zanoni > > Also document the WA name for the previous gens that implement it. Looks good based on the existing workarounds and specs; was unable to find any further details on the WA. Reviewed-by: Jani Nikula > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_pm.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 59068be..150aebd 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3450,6 +3450,7 @@ static void gen6_init_clock_gating(struct drm_device *dev) > ILK_DPARBUNIT_CLOCK_GATE_ENABLE | > ILK_DPFDUNIT_CLOCK_GATE_ENABLE); > > + /* WaMbcDriverBootEnable */ > I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) | > GEN6_MBCTL_ENABLE_BOOT_FETCH); > > @@ -3520,6 +3521,10 @@ static void haswell_init_clock_gating(struct drm_device *dev) > I915_WRITE(CACHE_MODE_1, > _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); > > + /* WaMbcDriverBootEnable */ > + I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) | > + GEN6_MBCTL_ENABLE_BOOT_FETCH); > + > /* XXX: This is a workaround for early silicon revisions and should be > * removed later. > */ > @@ -3595,6 +3600,7 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) > intel_flush_display_plane(dev_priv, pipe); > } > > + /* WaMbcDriverBootEnable */ > I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) | > GEN6_MBCTL_ENABLE_BOOT_FETCH); > > @@ -3647,6 +3653,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev) > I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) | > GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB); > > + /* WaMbcDriverBootEnable */ > I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) | > GEN6_MBCTL_ENABLE_BOOT_FETCH); > > -- > 1.7.11.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx