From: Richard Sandiford <rdsandiford@googlemail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH] Fix truncate/extend reversal in MIPS DIV{, U} handling
Date: Sun, 25 May 2008 10:50:25 +0100 [thread overview]
Message-ID: <87od6u67by.fsf@firetop.home> (raw)
The MIPS DIV and DIVU handling has the truncations and extensions
reversed. This means that, on 64-bit targets, 32-bit results are
not being sign-extended to fill LO and HI.
Richard
Index: qemu/target-mips/translate.c
===================================================================
--- qemu.orig/target-mips/translate.c 2008-05-25 09:57:57.000000000 +0100
+++ qemu/target-mips/translate.c 2008-05-25 09:57:58.000000000 +0100
@@ -1989,12 +1989,12 @@ static void gen_muldiv (DisasContext *ct
TCGv r_tmp2 = new_tmp();
TCGv r_tmp3 = new_tmp();
- tcg_gen_ext_i32_tl(r_tmp1, cpu_T[0]);
- tcg_gen_ext_i32_tl(r_tmp2, cpu_T[1]);
+ tcg_gen_trunc_tl_i32(r_tmp1, cpu_T[0]);
+ tcg_gen_trunc_tl_i32(r_tmp2, cpu_T[1]);
tcg_gen_div_i32(r_tmp3, r_tmp1, r_tmp2);
tcg_gen_rem_i32(r_tmp1, r_tmp1, r_tmp2);
- tcg_gen_trunc_tl_i32(cpu_T[0], r_tmp3);
- tcg_gen_trunc_tl_i32(cpu_T[1], r_tmp1);
+ tcg_gen_ext_i32_tl(cpu_T[0], r_tmp3);
+ tcg_gen_ext_i32_tl(cpu_T[1], r_tmp1);
gen_store_LO(cpu_T[0], 0);
gen_store_HI(cpu_T[1], 0);
dead_tmp(r_tmp1);
@@ -2015,12 +2015,12 @@ static void gen_muldiv (DisasContext *ct
TCGv r_tmp2 = new_tmp();
TCGv r_tmp3 = new_tmp();
- tcg_gen_ext_i32_tl(r_tmp1, cpu_T[0]);
- tcg_gen_ext_i32_tl(r_tmp2, cpu_T[1]);
+ tcg_gen_trunc_tl_i32(r_tmp1, cpu_T[0]);
+ tcg_gen_trunc_tl_i32(r_tmp2, cpu_T[1]);
tcg_gen_divu_i32(r_tmp3, r_tmp1, r_tmp2);
tcg_gen_remu_i32(r_tmp1, r_tmp1, r_tmp2);
- tcg_gen_trunc_tl_i32(cpu_T[0], r_tmp3);
- tcg_gen_trunc_tl_i32(cpu_T[1], r_tmp1);
+ tcg_gen_ext_i32_tl(cpu_T[0], r_tmp3);
+ tcg_gen_ext_i32_tl(cpu_T[1], r_tmp1);
gen_store_LO(cpu_T[0], 0);
gen_store_HI(cpu_T[1], 0);
dead_tmp(r_tmp1);
reply other threads:[~2008-05-25 9:50 UTC|newest]
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