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bh=EOThfG1gAEQrdHbmqd9U2MHSe1d8X1Jx4rb69pMs/X8=; b=U1u0vcPS0rl4z2+2fhX2VGhVdHFt5eSkTXIxrhry+eSFu7QOpEtU9vCK2f9IYzl8ajgjLg Kcn+Klbb4KJLqYMMRcFDbrBR3ckaE2OHtDU8y5BMPf7ADpMoFmdkrvDx5D2HZMfUL9ptTE ztq1fekIUw73uu79IhccWuBuvsEdgrqHk/8D6MZpaMIncWO2fRsXmAVMbTuPin4zcpEp1S a+dcG5iMctAIaGVE4RzzcVB1sV/EfKO2By3dRvRMb/aUXLt1JJ/0cv9apHwoQydLknN2hp 2AzOVrDyYH8CA5qwTZ4D0ZA/ODweTBwZWDOoFmpULIPl3cJjGcMY28vs9WP7kw== From: Miquel Raynal To: Mark Brown Cc: Fei Xie , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Parshuram Thombare , linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 2/4] spi: cadence-xspi: add ACMD support for SPI NAND In-Reply-To: <67f4e1a4-fc0e-4b2b-b41e-8dbb33227302@sirena.org.uk> (Mark Brown's message of "Thu, 24 Sep 2026 19:55:58 +0100") References: <20260921093701.1341766-1-fei.xie@horizon.auto> <20260921093701.1341766-3-fei.xie@horizon.auto> <20260923061211.1608907-1-fei.xie@horizon.auto> <67f4e1a4-fc0e-4b2b-b41e-8dbb33227302@sirena.org.uk> User-Agent: mu4e 1.12.12; emacs 30.2 Date: Fri, 25 Sep 2026 11:45:51 +0200 Message-ID: <87pky1ll4g.fsf@bootlin.com> MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260925_024603_289948_AFFAC208 X-CRM114-Status: GOOD ( 15.13 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org T24gMjQvMDkvMjAyNiBhdCAxOTo1NTo1OCArMDEsIE1hcmsgQnJvd24gPGJyb29uaWVAa2VybmVs Lm9yZz4gd3JvdGU6Cgo+IE9uIFdlZCwgU2VwIDIzLCAyMDI2IGF0IDAyOjEyOjExUE0gKzA4MDAs IEZlaSBYaWUgd3JvdGU6Cj4KPj4gVGhlIGRpZmZpY3VsdHkgaXMgdGhhdCB0aGUgaGFyZHdhcmUg QUNNRCBzZXF1ZW5jZXIgbmVlZHMgdGhlIGNvbXBsZXRlCj4+IG11bHRpLW9wZXJhdGlvbiBzZXF1 ZW5jZSB0byBiZSBkZXNjcmliZWQgYmVmb3JlIGl0IGlzIHN0YXJ0ZWQuIEZvcgo+PiBleGFtcGxl LCB0aGUgU1BJIE5BTkQgY29yZSBjdXJyZW50bHkgc3VibWl0cyBQQUdFIFJFQUQsIHN0YXR1cyBw b2xsaW5nCj4+IGFuZCBSRUFEIENBQ0hFIGFzIHNlcGFyYXRlIHNwaV9tZW1fZXhlY19vcCgpIGNh bGxzLiBUaGUgU1RJRyBwYXRoIGNhbgo+PiBleGVjdXRlIHRob3NlIG9wZXJhdGlvbnMgaW5kaXZp ZHVhbGx5LCB3aGlsZSB0aGUgQUNNRCBoYXJkd2FyZSBjb21iaW5lcwo+PiB0aGVtIGludG8gb25l IHByb2dyYW1tZWQgc2VxdWVuY2UuCj4KPj4gV291bGQgYW4gU1BJLW1lbSBvcGVyYXRpb24tc2Vx dWVuY2UgaW50ZXJmYWNlIGJlIGEgcmVhc29uYWJsZSBkaXJlY3Rpb24KPj4gdG8gZXhwbG9yZT8g VGhlIE5BTkQgY29yZSBjb3VsZCBkZXNjcmliZSB0aGUgb3JkZXJlZCBvcGVyYXRpb25zIGFuZAo+ PiBwb2xsaW5nIGNvbmRpdGlvbiwgYW5kIHRoZSBjb250cm9sbGVyIGNvdWxkIGVpdGhlciBleGVj dXRlIHRoZSBzZXF1ZW5jZQo+PiBpbiBoYXJkd2FyZSBvciBmYWxsIGJhY2sgdG8gdGhlIGV4aXN0 aW5nIGluZGl2aWR1YWwgb3BlcmF0aW9ucy4gVGhpcwo+PiB3b3VsZCBrZWVwIE5BTkQtc3BlY2lm aWMga25vd2xlZGdlIG91dCBvZiB0aGUgY29udHJvbGxlciBkcml2ZXIuCj4KPiBJIHRoaW5rIHRo YXQgbWFrZXMgc2Vuc2UsIHRoYXQgbWlycm9ycyBzb21lIGlkZWFzIHBlb3BsZSBoYXZlIGhhZCBm b3IKPiBvcHRpbWlzaW5nIFNQSSBtZXNhZ2VzIGluIGdlbmVyYWwgLSBzdWJtaXQgdGhlIHNlcXVl bmNlIHRvIHRoZSBkcml2ZXIgdG8KPiBzZWUgaWYgaXQgY2FuIGRvIGl0IGluIG9uZSwgZmFsbGlu ZyBiYWNrIHRvIGp1c3QgcnVubmluZyBpbmRpdmlkdWFsCj4gb3BlcmF0aW9ucyBpZiB0aGF0IGRv ZXNuJ3Qgd29yay4gIFNlZSBzcGlfb3B0aW1pemVfbWVzc2FnZSgpLgoKVGhlIHNwaS1tZW0gb3Bl cmF0aW9uLXNlcXVlbmNlIGludGVyZmFjZSBzZWVtcyB2ZXJ5IGNvbXBsZXggdG8gaGFuZGxlCmNv cnJlY3RseSBJTUhPLiBJIGZlYXIgc3VjaCBhIHNvbHV0aW9uIHdvdWxkIGFsc28gcmVxdWlyZSBt YWpvciByZXdyaXRlcwpvZiB0aGUgY29yZS4gSXQgaXMgYWx3YXlzIGhhcmQgdG8gbWFrZSBmaXQg aGFyZHdhcmUgaW4gY29kZSBiYXNlcyBub3QKdGhvdWdodCBmb3IgdGhlbS4gTW9zdCBvZiB0aGUg dGltZSBiZWluZyBzcGVudCBpbiBJL09zIGFuZCB3YWl0IHN0YXRlcywKSSBhbSB3b25kZXJpbmcg aG93IG11Y2ggd291bGQgYmUgc2F2ZWQgYnkgcGFja2luZyB0aGUgY29tbWFuZHMuIERvIHlvdQpo YXZlIGJlbmNobWFya3M/CgpUaGFua3MsCk1pcXXDqGwKCl9fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpMaW51eCBNVEQgZGlzY3Vzc2lvbiBtYWls aW5nIGxpc3QKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51 eC1tdGQvCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B5CC321F5E for ; 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arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="U1u0vcPS" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id B037D4E41074; Fri, 25 Sep 2026 09:45:59 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 835886073B; Fri, 25 Sep 2026 09:45:59 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 4C531103282AA; Fri, 25 Sep 2026 11:45:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790329558; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=EOThfG1gAEQrdHbmqd9U2MHSe1d8X1Jx4rb69pMs/X8=; b=U1u0vcPS0rl4z2+2fhX2VGhVdHFt5eSkTXIxrhry+eSFu7QOpEtU9vCK2f9IYzl8ajgjLg Kcn+Klbb4KJLqYMMRcFDbrBR3ckaE2OHtDU8y5BMPf7ADpMoFmdkrvDx5D2HZMfUL9ptTE ztq1fekIUw73uu79IhccWuBuvsEdgrqHk/8D6MZpaMIncWO2fRsXmAVMbTuPin4zcpEp1S a+dcG5iMctAIaGVE4RzzcVB1sV/EfKO2By3dRvRMb/aUXLt1JJ/0cv9apHwoQydLknN2hp 2AzOVrDyYH8CA5qwTZ4D0ZA/ODweTBwZWDOoFmpULIPl3cJjGcMY28vs9WP7kw== From: Miquel Raynal To: Mark Brown Cc: Fei Xie , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Parshuram Thombare , linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 2/4] spi: cadence-xspi: add ACMD support for SPI NAND In-Reply-To: <67f4e1a4-fc0e-4b2b-b41e-8dbb33227302@sirena.org.uk> (Mark Brown's message of "Thu, 24 Sep 2026 19:55:58 +0100") References: <20260921093701.1341766-1-fei.xie@horizon.auto> <20260921093701.1341766-3-fei.xie@horizon.auto> <20260923061211.1608907-1-fei.xie@horizon.auto> <67f4e1a4-fc0e-4b2b-b41e-8dbb33227302@sirena.org.uk> User-Agent: mu4e 1.12.12; emacs 30.2 Date: Fri, 25 Sep 2026 11:45:51 +0200 Message-ID: <87pky1ll4g.fsf@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 On 24/09/2026 at 19:55:58 +01, Mark Brown wrote: > On Wed, Sep 23, 2026 at 02:12:11PM +0800, Fei Xie wrote: > >> The difficulty is that the hardware ACMD sequencer needs the complete >> multi-operation sequence to be described before it is started. For >> example, the SPI NAND core currently submits PAGE READ, status polling >> and READ CACHE as separate spi_mem_exec_op() calls. The STIG path can >> execute those operations individually, while the ACMD hardware combines >> them into one programmed sequence. > >> Would an SPI-mem operation-sequence interface be a reasonable direction >> to explore? The NAND core could describe the ordered operations and >> polling condition, and the controller could either execute the sequence >> in hardware or fall back to the existing individual operations. This >> would keep NAND-specific knowledge out of the controller driver. > > I think that makes sense, that mirrors some ideas people have had for > optimising SPI mesages in general - submit the sequence to the driver to > see if it can do it in one, falling back to just running individual > operations if that doesn't work. See spi_optimize_message(). The spi-mem operation-sequence interface seems very complex to handle correctly IMHO. I fear such a solution would also require major rewrites of the core. It is always hard to make fit hardware in code bases not thought for them. Most of the time being spent in I/Os and wait states, I am wondering how much would be saved by packing the commands. Do you have benchmarks? Thanks, Miqu=C3=A8l