From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Arnd Bergmann <arnd@arndb.de>, kernel test robot <lkp@intel.com>,
Paul Burton <paulburton@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
linux-mips@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>
Cc: oe-kbuild-all@lists.linux.dev,
"Vladimir Kondratiev" <vladimir.kondratiev@intel.com>,
"Tawfik Bayouk" <tawfik.bayouk@mobileye.com>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
"Théo Lebrun" <theo.lebrun@bootlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Chanho Min" <chanho.min@lge.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Russell King" <linux@armlinux.org.uk>
Subject: Re: [PATCH 10/11] MIPS: generic: Add support for Mobileye EyeQ5
Date: Mon, 09 Oct 2023 16:58:53 +0200 [thread overview]
Message-ID: <87pm1nc05u.fsf@BL-laptop> (raw)
In-Reply-To: <86db0fe5-930d-4cbb-bd7d-03367da38951@app.fastmail.com>
Hello,
> On Thu, Oct 5, 2023, at 02:08, kernel test robot wrote:
>> Hi Gregory,
>>
>> kernel test robot noticed the following build errors:
>>
>> [auto build test ERROR on robh/for-next]
>> [also build test ERROR on lee-mfd/for-mfd-next linus/master v6.6-rc4
>> next-20231004]
>> [cannot apply to lee-mfd/for-mfd-fixes]
>> [If your patch is applied to the wrong git tree, kindly drop us a note.
>> And when submitting patch, we suggest to use '--base' as documented in
>> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
>
>> If you fix the issue in a separate patch/commit (i.e. not just a new
>> version of
>> the same patch/commit), kindly add following tags
>> | Reported-by: kernel test robot <lkp@intel.com>
>> | Closes:
>> https://lore.kernel.org/oe-kbuild-all/202310050726.GDpZbMDO-lkp@intel.com/
>>
>> All error/warnings (new ones prefixed by >>):
>>
>> drivers/tty/serial/amba-pl011.c: In function 'pl011_sgbuf_init':
>>>> drivers/tty/serial/amba-pl011.c:380:30: error: implicit declaration of function 'phys_to_page'; did you mean 'pfn_to_page'? [-Werror=implicit-function-declaration]
>> 380 | sg_set_page(&sg->sg, phys_to_page(dma_addr),
>> | ^~~~~~~~~~~~
>> | pfn_to_page
>
> I discussed this with Gregory on IRC, and prototyped a
> possible fix. The issue was caused by the use of coherent memory
> for the buffer and passing that into a scatterlist structure.
>
> Since there is no guarantee that the memory returned by
> dma_alloc_coherent() is associated with a 'struct page', using
> the architecture specific phys_to_page() is wrong, but using
> virt_to_page() would be as well.
>
> An easy workaround is to stop using sg lists altogether and
> just use the *_single() functions instead. This also simplifies
> the code a bit since the scatterlists in this driver always have
> only one entry anyway.
>
> Fixes: cb06ff102e2d7 ("ARM: PL011: Add support for Rx DMA buffer polling.")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I tested the following patch and it didn't introduce any regression and
when using the same defconfig than the bot there is no more any error.
So we can add,
Tested-by: Gregory CLEMENT <gregory.clement@bootlin.com>
However, we don't use DMA on our platform for UART so the tests are
limited.
Linus; I know that you have a couple of boards that used the same UART
controller. By any chance do you have some of them with DMA support that
you could test ?
Gregory
PS: we are going to send series of clean-up and improvement for the
pl011, but there are not mandatory for using the EyeQ5 platform. We
hope being able to send them soon.
>
> diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
> index 0667e045ccb31..a3d92a91ff17d 100644
> --- a/drivers/tty/serial/amba-pl011.c
> +++ b/drivers/tty/serial/amba-pl011.c
> @@ -219,8 +219,9 @@ static struct vendor_data vendor_st = {
> /* Deals with DMA transactions */
>
> struct pl011_sgbuf {
> - struct scatterlist sg;
> - char *buf;
> + dma_addr_t dma;
> + size_t len;
> + char *buf;
> };
>
> struct pl011_dmarx_data {
> @@ -241,7 +242,8 @@ struct pl011_dmarx_data {
>
> struct pl011_dmatx_data {
> struct dma_chan *chan;
> - struct scatterlist sg;
> + dma_addr_t dma;
> + size_t len;
> char *buf;
> bool queued;
> };
> @@ -369,18 +371,11 @@ static int pl011_fifo_to_tty(struct uart_amba_port *uap)
> static int pl011_sgbuf_init(struct dma_chan *chan, struct pl011_sgbuf *sg,
> enum dma_data_direction dir)
> {
> - dma_addr_t dma_addr;
> -
> - sg->buf = dma_alloc_coherent(chan->device->dev,
> - PL011_DMA_BUFFER_SIZE, &dma_addr, GFP_KERNEL);
> + sg->buf = dma_alloc_coherent(chan->device->dev, PL011_DMA_BUFFER_SIZE,
> + &sg->dma, GFP_KERNEL);
> if (!sg->buf)
> return -ENOMEM;
> -
> - sg_init_table(&sg->sg, 1);
> - sg_set_page(&sg->sg, phys_to_page(dma_addr),
> - PL011_DMA_BUFFER_SIZE, offset_in_page(dma_addr));
> - sg_dma_address(&sg->sg) = dma_addr;
> - sg_dma_len(&sg->sg) = PL011_DMA_BUFFER_SIZE;
> + sg->len = PL011_DMA_BUFFER_SIZE;
>
> return 0;
> }
> @@ -390,8 +385,7 @@ static void pl011_sgbuf_free(struct dma_chan *chan, struct pl011_sgbuf *sg,
> {
> if (sg->buf) {
> dma_free_coherent(chan->device->dev,
> - PL011_DMA_BUFFER_SIZE, sg->buf,
> - sg_dma_address(&sg->sg));
> + PL011_DMA_BUFFER_SIZE, sg->buf, sg->dma);
> }
> }
>
> @@ -552,8 +546,8 @@ static void pl011_dma_tx_callback(void *data)
>
> uart_port_lock_irqsave(&uap->port, &flags);
> if (uap->dmatx.queued)
> - dma_unmap_sg(dmatx->chan->device->dev, &dmatx->sg, 1,
> - DMA_TO_DEVICE);
> + dma_unmap_single(dmatx->chan->device->dev, dmatx->dma,
> + dmatx->len, DMA_TO_DEVICE);
>
> dmacr = uap->dmacr;
> uap->dmacr = dmacr & ~UART011_TXDMAE;
> @@ -639,18 +633,19 @@ static int pl011_dma_tx_refill(struct uart_amba_port *uap)
> memcpy(&dmatx->buf[first], &xmit->buf[0], second);
> }
>
> - dmatx->sg.length = count;
> -
> - if (dma_map_sg(dma_dev->dev, &dmatx->sg, 1, DMA_TO_DEVICE) != 1) {
> + dmatx->len = count;
> + dmatx->dma = dma_map_single(dma_dev->dev, dmatx->buf, count,
> + DMA_TO_DEVICE);
> + if (dmatx->dma == DMA_MAPPING_ERROR) {
> uap->dmatx.queued = false;
> dev_dbg(uap->port.dev, "unable to map TX DMA\n");
> return -EBUSY;
> }
>
> - desc = dmaengine_prep_slave_sg(chan, &dmatx->sg, 1, DMA_MEM_TO_DEV,
> + desc = dmaengine_prep_slave_single(chan, dmatx->dma, dmatx->len, DMA_MEM_TO_DEV,
> DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> if (!desc) {
> - dma_unmap_sg(dma_dev->dev, &dmatx->sg, 1, DMA_TO_DEVICE);
> + dma_unmap_single(dma_dev->dev, dmatx->dma, dmatx->len, DMA_TO_DEVICE);
> uap->dmatx.queued = false;
> /*
> * If DMA cannot be used right now, we complete this
> @@ -813,8 +808,8 @@ __acquires(&uap->port.lock)
> dmaengine_terminate_async(uap->dmatx.chan);
>
> if (uap->dmatx.queued) {
> - dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1,
> - DMA_TO_DEVICE);
> + dma_unmap_single(uap->dmatx.chan->device->dev, uap->dmatx.dma,
> + uap->dmatx.len, DMA_TO_DEVICE);
> uap->dmatx.queued = false;
> uap->dmacr &= ~UART011_TXDMAE;
> pl011_write(uap->dmacr, uap, REG_DMACR);
> @@ -836,7 +831,7 @@ static int pl011_dma_rx_trigger_dma(struct uart_amba_port *uap)
> /* Start the RX DMA job */
> sgbuf = uap->dmarx.use_buf_b ?
> &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a;
> - desc = dmaengine_prep_slave_sg(rxchan, &sgbuf->sg, 1,
> + desc = dmaengine_prep_slave_single(rxchan, sgbuf->dma, sgbuf->len,
> DMA_DEV_TO_MEM,
> DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
> /*
> @@ -886,7 +881,7 @@ static void pl011_dma_rx_chars(struct uart_amba_port *uap,
>
> if (uap->dmarx.poll_rate) {
> /* The data can be taken by polling */
> - dmataken = sgbuf->sg.length - dmarx->last_residue;
> + dmataken = sgbuf->len - dmarx->last_residue;
> /* Recalculate the pending size */
> if (pending >= dmataken)
> pending -= dmataken;
> @@ -911,7 +906,7 @@ static void pl011_dma_rx_chars(struct uart_amba_port *uap,
>
> /* Reset the last_residue for Rx DMA poll */
> if (uap->dmarx.poll_rate)
> - dmarx->last_residue = sgbuf->sg.length;
> + dmarx->last_residue = sgbuf->len;
>
> /*
> * Only continue with trying to read the FIFO if all DMA chars have
> @@ -969,7 +964,7 @@ static void pl011_dma_rx_irq(struct uart_amba_port *uap)
> pl011_write(uap->dmacr, uap, REG_DMACR);
> uap->dmarx.running = false;
>
> - pending = sgbuf->sg.length - state.residue;
> + pending = sgbuf->len - state.residue;
> BUG_ON(pending > PL011_DMA_BUFFER_SIZE);
> /* Then we terminate the transfer - we now know our residue */
> dmaengine_terminate_all(rxchan);
> @@ -1015,7 +1010,7 @@ static void pl011_dma_rx_callback(void *data)
> * the DMA irq handler. So we check the residue here.
> */
> rxchan->device->device_tx_status(rxchan, dmarx->cookie, &state);
> - pending = sgbuf->sg.length - state.residue;
> + pending = sgbuf->len - state.residue;
> BUG_ON(pending > PL011_DMA_BUFFER_SIZE);
> /* Then we terminate the transfer - we now know our residue */
> dmaengine_terminate_all(rxchan);
> @@ -1074,7 +1069,7 @@ static void pl011_dma_rx_poll(struct timer_list *t)
> sgbuf = dmarx->use_buf_b ? &uap->dmarx.sgbuf_b : &uap->dmarx.sgbuf_a;
> rxchan->device->device_tx_status(rxchan, dmarx->cookie, &state);
> if (likely(state.residue < dmarx->last_residue)) {
> - dmataken = sgbuf->sg.length - dmarx->last_residue;
> + dmataken = sgbuf->len - dmarx->last_residue;
> size = dmarx->last_residue - state.residue;
> dma_count = tty_insert_flip_string(port, sgbuf->buf + dmataken,
> size);
> @@ -1123,7 +1118,7 @@ static void pl011_dma_startup(struct uart_amba_port *uap)
> return;
> }
>
> - sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE);
> + uap->dmatx.len = PL011_DMA_BUFFER_SIZE;
>
> /* The DMA buffer is now the FIFO the TTY subsystem can use */
> uap->port.fifosize = PL011_DMA_BUFFER_SIZE;
> @@ -1200,8 +1195,9 @@ static void pl011_dma_shutdown(struct uart_amba_port *uap)
> /* In theory, this should already be done by pl011_dma_flush_buffer */
> dmaengine_terminate_all(uap->dmatx.chan);
> if (uap->dmatx.queued) {
> - dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1,
> - DMA_TO_DEVICE);
> + dma_unmap_single(uap->dmatx.chan->device->dev,
> + uap->dmatx.dma, uap->dmatx.len,
> + DMA_TO_DEVICE);
> uap->dmatx.queued = false;
> }
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
next prev parent reply other threads:[~2023-10-09 14:59 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-04 16:10 [PATCH 00/11] Add support for the Mobileye EyeQ5 SoC Gregory CLEMENT
2023-10-04 16:10 ` [PATCH 01/11] MIPS: compressed: Use correct instruction for 64 bit code Gregory CLEMENT
2023-10-05 6:40 ` Philippe Mathieu-Daudé
2023-10-24 1:49 ` Florian Fainelli
2023-10-04 16:10 ` [PATCH 02/11] MIPS: use virtual addresses from xkphys for MIPS64 Gregory CLEMENT
2023-10-12 15:34 ` Thomas Bogendoerfer
2023-10-22 11:52 ` Jiaxun Yang
2023-10-22 11:39 ` Jiaxun Yang
2023-10-23 15:45 ` Gregory CLEMENT
2023-10-22 16:42 ` Jiaxun Yang
2023-10-24 16:08 ` Gregory CLEMENT
2023-10-04 16:10 ` [PATCH 03/11] MIPS: support RAM beyond 32-bit Gregory CLEMENT
2023-10-06 11:21 ` Arnd Bergmann
2023-10-07 20:14 ` Jiaxun Yang
2023-10-09 15:59 ` Gregory CLEMENT
2023-10-10 8:55 ` Jiaxun Yang
2023-10-11 14:46 ` Gregory CLEMENT
2023-10-12 20:40 ` Jiaxun Yang
2023-10-24 9:05 ` Maciej W. Rozycki
2023-10-04 16:10 ` [PATCH 04/11] dt-bindings: Add vendor prefix for Mobileye Vision Technologies Ltd Gregory CLEMENT
2023-10-05 6:34 ` Philippe Mathieu-Daudé
2023-10-06 16:32 ` Rob Herring
2023-10-04 16:10 ` [PATCH 05/11] dt-bindings: mips: cpu: Add I-Class I6500 Multiprocessor Core Gregory CLEMENT
2023-10-05 6:31 ` Philippe Mathieu-Daudé
2023-10-05 14:39 ` Serge Semin
2023-10-05 14:51 ` Gregory CLEMENT
2023-10-05 15:23 ` Serge Semin
2023-10-06 10:48 ` Arnd Bergmann
2023-10-06 16:40 ` Rob Herring
2023-10-09 15:32 ` Gregory CLEMENT
2023-10-09 18:48 ` Arnd Bergmann
2023-10-10 10:13 ` Serge Semin
2023-10-05 14:47 ` Sergio Paracuellos
2023-10-04 16:10 ` [PATCH 06/11] dt-bindings: mips: Add bindings for Mobileye SoCs Gregory CLEMENT
2023-10-04 16:47 ` Rob Herring
2023-10-05 14:55 ` Gregory CLEMENT
2023-10-06 16:50 ` Rob Herring
2023-10-04 16:10 ` [PATCH 07/11] dt-bindings: mfd: syscon: Document EyeQ5 OLB Gregory CLEMENT
2023-10-06 16:54 ` Rob Herring
2023-10-09 15:49 ` Gregory CLEMENT
2023-10-04 16:10 ` [PATCH 08/11] MIPS: mobileye: Add EyeQ5 dtsi Gregory CLEMENT
2023-10-04 16:41 ` Rob Herring
2023-10-05 15:17 ` Gregory CLEMENT
2023-10-04 16:10 ` [PATCH 09/11] MIPS: mobileye: Add EPM5 device tree Gregory CLEMENT
2023-10-06 11:18 ` Arnd Bergmann
2023-10-09 14:51 ` Gregory CLEMENT
2023-10-04 16:10 ` [PATCH 10/11] MIPS: generic: Add support for Mobileye EyeQ5 Gregory CLEMENT
2023-10-05 0:08 ` kernel test robot
2023-10-06 14:47 ` Arnd Bergmann
2023-10-09 14:58 ` Gregory CLEMENT [this message]
2023-10-04 16:10 ` [PATCH 11/11] MAINTAINERS: Add entry for Mobileye MIPS SoCs Gregory CLEMENT
2023-10-06 11:11 ` Arnd Bergmann
2023-10-09 15:06 ` Gregory CLEMENT
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