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Tsirkin" , Marcel Apfelbaum Subject: Re: [PATCH 1/9] hw/i386/sgx: Do not open-code qdev_realize_and_unref() References: <20230203113650.78146-1-philmd@linaro.org> <20230203113650.78146-2-philmd@linaro.org> <87lelfc4l1.fsf@pond.sub.org> <3b377013-778e-b5b4-4c40-bfbecaba8415@linaro.org> Date: Fri, 03 Feb 2023 14:36:26 +0100 In-Reply-To: <3b377013-778e-b5b4-4c40-bfbecaba8415@linaro.org> ("Philippe =?utf-8?Q?Mathieu-Daud=C3=A9=22's?= message of "Fri, 3 Feb 2023 14:15:45 +0100") Message-ID: <87pmaqc1lx.fsf@pond.sub.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.1 on 10.11.54.3 Received-SPF: pass client-ip=170.10.133.124; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: pXM9B6bUZDq9 Philippe Mathieu-Daud=C3=A9 writes: > On 3/2/23 13:32, Markus Armbruster wrote: >> Philippe Mathieu-Daud=C3=A9 writes: >>=20 >>> Signed-off-by: Philippe Mathieu-Daud=C3=A9 >>> --- >>> hw/i386/sgx.c | 5 ++--- >>> 1 file changed, 2 insertions(+), 3 deletions(-) >>> >>> diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c >>> index db004d17a6..5ddc5d7ea2 100644 >>> --- a/hw/i386/sgx.c >>> +++ b/hw/i386/sgx.c >>> @@ -299,7 +299,7 @@ void pc_machine_init_sgx_epc(PCMachineState *pcms) >>> &sgx_epc->mr); >>>=20=20=20 >>> for (list =3D x86ms->sgx_epc_list; list; list =3D list->next) { >>> - obj =3D object_new("sgx-epc"); >>> + obj =3D object_new(TYPE_SGX_EPC); >>=20 >> I wonder why this doesn't use qdev_new(). > > OK. Observation, not demand! >>> /* set the memdev link with memory backend */ >>> object_property_parse(obj, SGX_EPC_MEMDEV_PROP, list->value->= memdev, >>> @@ -307,8 +307,7 @@ void pc_machine_init_sgx_epc(PCMachineState *pcms) >>> /* set the numa node property for sgx epc object */ >>> object_property_set_uint(obj, SGX_EPC_NUMA_NODE_PROP, list->v= alue->node, >>> &error_fatal); >>> - object_property_set_bool(obj, "realized", true, &error_fatal); >>> - object_unref(obj); >>> + qdev_realize_and_unref(DEVICE(obj), NULL, &error_fatal); >>=20 >> Yes, please! Must have crept in after I converted all realizations. >> I can see two more: >>=20 >> hw/pci/pcie_sriov.c: object_property_set_bool(OBJECT(vf), "realiz= ed", false, &local_err); >> linux-user/syscall.c: object_property_set_bool(OBJECT(cpu), "= realized", false, NULL); > > No: these would be qdev_UNrealize_and_unref(). You're right. > Do we want it? > Maybe to avoid open-coding it, yes? I think so. See dc3edf8d8a qdev: Convert to qdev_unrealize() manually 981c3dcd94 qdev: Convert to qdev_unrealize() with Coccinelle >>> } >>>=20=20=20 >>> if ((sgx_epc->base + sgx_epc->size) < sgx_epc->base) { >>=20 >> Reviewed-by: Markus Armbruster > > Thanks!