From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [RFC PATCH v2 14/23] KVM: Allow 2048-bit register access via ioctl interface Date: Tue, 20 Nov 2018 11:20:04 +0000 Message-ID: <87pnv0hu6z.fsf@linaro.org> References: <1538141967-15375-1-git-send-email-Dave.Martin@arm.com> <1538141967-15375-15-git-send-email-Dave.Martin@arm.com> <87r2fhhv2z.fsf@linaro.org> <20181119170727.GY3505@e103592.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 7E9454A320 for ; Tue, 20 Nov 2018 06:20:08 -0500 (EST) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HcTENhh2iQ5w for ; Tue, 20 Nov 2018 06:20:07 -0500 (EST) Received: from mail-wm1-f67.google.com (mail-wm1-f67.google.com [209.85.128.67]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 55FB04A2F8 for ; Tue, 20 Nov 2018 06:20:07 -0500 (EST) Received: by mail-wm1-f67.google.com with SMTP id q26so1784686wmf.5 for ; Tue, 20 Nov 2018 03:20:07 -0800 (PST) In-reply-to: <20181119170727.GY3505@e103592.cambridge.arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Dave Martin Cc: Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu CkRhdmUgTWFydGluIDxEYXZlLk1hcnRpbkBhcm0uY29tPiB3cml0ZXM6Cgo+IE9uIE1vbiwgTm92 IDE5LCAyMDE4IGF0IDA0OjQ4OjM2UE0gKzAwMDAsIEFsZXggQmVubsOpZSB3cm90ZToKPj4KPj4g RGF2ZSBNYXJ0aW4gPERhdmUuTWFydGluQGFybS5jb20+IHdyaXRlczoKPj4KPj4gPiBUaGUgQXJt IFNWRSBhcmNoaXRlY3R1cmUgZGVmaW5lcyByZWdpc3RlcnMgdGhhdCBhcmUgdXAgdG8gMjA0OCBi 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QGxpc3RzLmNzLmNvbHVtYmlhLmVkdQpodHRwczovL2xpc3RzLmNzLmNvbHVtYmlhLmVkdS9tYWls bWFuL2xpc3RpbmZvL2t2bWFybQo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: alex.bennee@linaro.org (Alex =?utf-8?Q?Benn=C3=A9e?=) Date: Tue, 20 Nov 2018 11:20:04 +0000 Subject: [RFC PATCH v2 14/23] KVM: Allow 2048-bit register access via ioctl interface In-Reply-To: <20181119170727.GY3505@e103592.cambridge.arm.com> References: <1538141967-15375-1-git-send-email-Dave.Martin@arm.com> <1538141967-15375-15-git-send-email-Dave.Martin@arm.com> <87r2fhhv2z.fsf@linaro.org> <20181119170727.GY3505@e103592.cambridge.arm.com> Message-ID: <87pnv0hu6z.fsf@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Dave Martin writes: > On Mon, Nov 19, 2018 at 04:48:36PM +0000, Alex Benn?e wrote: >> >> Dave Martin writes: >> >> > The Arm SVE architecture defines registers that are up to 2048 bits >> > in size (with some possibility of further future expansion). >> > >> > In order to avoid the need for an excessively large number of >> > ioctls when saving and restoring a vcpu's registers, this patch >> > adds a #define to make support for individual 2048-bit registers >> > through the KVM_{GET,SET}_ONE_REG ioctl interface official. This >> > will allow each SVE register to be accessed in a single call. >> > >> > There are sufficient spare bits in the register id size field for >> > this change, so there is no ABI impact providing that >> > KVM_GET_REG_LIST does not enumerate any 2048-bit register unless >> > userspace explicitly opts in to the relevant architecture-specific >> > features. >> > >> > Signed-off-by: Dave Martin >> > --- >> > include/uapi/linux/kvm.h | 1 + >> > 1 file changed, 1 insertion(+) >> > >> > diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h >> > index 251be35..7c3c5cc 100644 >> > --- a/include/uapi/linux/kvm.h >> > +++ b/include/uapi/linux/kvm.h >> > @@ -1110,6 +1110,7 @@ struct kvm_dirty_tlb { >> > #define KVM_REG_SIZE_U256 0x0050000000000000ULL >> > #define KVM_REG_SIZE_U512 0x0060000000000000ULL >> > #define KVM_REG_SIZE_U1024 0x0070000000000000ULL >> > +#define KVM_REG_SIZE_U2048 0x0080000000000000ULL >> >> Yeah OK I guess - but it does make me question if KVM_REG_SIZE_MASK is >> part of the ABI because although we have space for another few bits that >> is the last one without changing the mask. > > Debatable, but KVM_REG_SIZE_MASK is UAPI and suggests a clear intent not > to recycle bit 55 for another purpose. This allows for reg sizes up to > 262144 bits which is hopefully more than enough for the foreseeable > future. > > Even if bits 56-59 are currently always 0, KVM_REG_ARCH_MASK suggests > that these bits aren't going to be used for size field bits. > > > Or am I missing something? No you are quite right - I thought I was watching an incrementing bit position not an incrementing number. Too much staring at defines, carry on ;-) > >> Reviewed-by: Alex Benn?e > > Thanks > ---Dave -- Alex Benn?e