From: Kevin Hilman <khilman@deeprootsystems.com>
To: Paul Walmsley <paul@pwsan.com>
Cc: Thara Gopinath <thara@ti.com>, linux-omap@vger.kernel.org
Subject: Re: [PATCH V2] OMAP3: PM: Fix for MPU power domain MEM BANK position
Date: Wed, 09 Dec 2009 15:36:17 -0800 [thread overview]
Message-ID: <87pr6nsosu.fsf@deeprootsystems.com> (raw)
In-Reply-To: <alpine.DEB.2.00.0912030538260.13408@utopia.booyaka.com> (Paul Walmsley's message of "Thu\, 3 Dec 2009 05\:38\:38 -0700 \(MST\)")
Paul Walmsley <paul@pwsan.com> writes:
> On Thu, 26 Nov 2009, Thara Gopinath wrote:
>
>> MPU power domain bank 0 bits are displayed in position of bank 1
>> in PWRSTS and PREPWRSTS registers. So read them from correct
>> position
>>
>> Signed-off-by: Thara Gopinath <thara@ti.com>
>> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
> Thanks Thara, will queue this up.
Kevin
next prev parent reply other threads:[~2009-12-09 23:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-11-26 11:14 [PATCH V2] OMAP3: PM: Fix for MPU power domain MEM BANK position Thara Gopinath
2009-12-03 12:38 ` Paul Walmsley
2009-12-09 23:36 ` Kevin Hilman [this message]
-- strict thread matches above, loose matches on Subject: below --
2009-08-27 17:39 [PATCH] " Aguirre Rodriguez, Sergio Alberto
2009-08-28 7:24 ` [PATCH V2] " Thara Gopinath
2009-09-15 16:23 ` Kevin Hilman
2009-10-14 23:21 ` Paul Walmsley
2009-10-15 9:41 ` Gopinath, Thara
2009-10-16 8:21 ` Paul Walmsley
2009-10-16 11:03 ` Gopinath, Thara
2009-11-23 14:39 ` Paul Walmsley
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