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From: Thomas Gleixner <tglx@linutronix.de>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: Tianyang Zhang <zhangtianyang@loongson.cn>,
	corbet@lwn.net, alexs@kernel.org, siyanteng@loongson.cn,
	kernel@xen0n.name, jiaxun.yang@flygoat.com, gaoliang@loongson.cn,
	wangliupu@loongson.cn, lvjianmin@loongson.cn, yijun@loongson.cn,
	mhocko@suse.com, akpm@linux-foundation.org,
	dianders@chromium.org, maobibo@loongson.cn, xry111@xry111.site,
	zhaotianrui@loongson.cn, nathan@kernel.org,
	yangtiezhu@loongson.cn, zhoubinbin@loongson.cn,
	loongarch@lists.linux.dev, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH V7] LoongArch: Add AVEC irqchip support
Date: Tue, 30 Jul 2024 13:29:26 +0200	[thread overview]
Message-ID: <87r0bb6ru1.ffs@tglx> (raw)
In-Reply-To: <CAAhV-H7c0Gtjf-6iS-E4nviMqmPWpJMNwvhWf0fLBx75pDXtrQ@mail.gmail.com>

Huacai!

On Tue, Jul 30 2024 at 16:51, Huacai Chen wrote:
> On Fri, Jul 26, 2024 at 11:12 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>> > +     while (true) {
>> > +             vector = csr_read64(LOONGARCH_CSR_IRR);
>> > +             if (vector & IRR_INVALID_MASK)
>> > +                     break;
>> > +
>> > +             vector &= IRR_VECTOR_MASK;
>> > +
>> > +             d = this_cpu_read(irq_map[vector]);
>> > +             if (d)
>> > +                     generic_handle_irq_desc(d);
>> > +             else {
>>
>> See bracket rules.
> Do you mean even if there is only one statement in the if condition,
> we still need to do like this?
> if (xxx) {
>     yyy;
> } else {
>     zzz;
> }

Yes. It's documented.

>> > +     msi_domain = pci_msi_create_irq_domain(pch_msi_handle[0],
>> > +                                            &pch_msi_domain_info_v2, parent);
>>
>> Please don't do that. Convert this to use per device MSI domains.
> OK, thanks. But it is better to split the conversion to another patch
> (so we can convert both V1 and V2).

Why adding it first?

This can be done per interrupt chip. See the conversion series for
ARM[64]:

    https://lore.kernel.org/r/20240623142137.448898081@linutronix.de

Thanks,

        tglx

  reply	other threads:[~2024-07-30 11:29 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-26 10:24 [PATCH V7] LoongArch: Add AVEC irqchip support Tianyang Zhang
2024-07-26 15:12 ` Thomas Gleixner
2024-07-30  8:51   ` Huacai Chen
2024-07-30 11:29     ` Thomas Gleixner [this message]
2024-08-03  6:40       ` Tianyang Zhang
2024-08-03  9:31         ` Thomas Gleixner
2024-08-04  2:41           ` Huacai Chen

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