Re: [Intel-gfx] [PATCH 1/6] drm/i915: Parse VRR capability from VBT

[Jani Nikula <jani.nikula@linux.intel.com>]

On Fri, 27 May 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> VBT seems to have an extra flag for VRR vs. not. Let's consult
> that for eDP panels.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c     |  5 +++++
>  .../drm/i915/display/intel_display_types.h    |  2 ++
>  drivers/gpu/drm/i915/display/intel_vrr.c      | 22 ++++++++++++++-----
>  3 files changed, 23 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 337277ae3dae..0774238e429b 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1293,6 +1293,8 @@ parse_power_conservation_features(struct drm_i915_private *i915,
>  	const struct bdb_lfp_power *power;
>  	u8 panel_type = panel->vbt.panel_type;
>  
> +	panel->vbt.vrr = true; /* matches Windows behaviour */
> +
>  	if (i915->vbt.version < 228)
>  		return;
>  
> @@ -1313,6 +1315,9 @@ parse_power_conservation_features(struct drm_i915_private *i915,
>  
>  	if (i915->vbt.version >= 232)
>  		panel->vbt.edp.hobl = power->hobl & BIT(panel_type);
> +
> +	if (i915->vbt.version >= 233)
> +		panel->vbt.vrr = power->vrr_feature_enabled & BIT(panel_type);
>  }
>  
>  static void
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index a27d66fd4383..7a76ba1a3b47 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -294,6 +294,8 @@ struct intel_vbt_panel_data {
>  	unsigned int lvds_dither:1;
>  	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
>  
> +	bool vrr;
> +
>  	u8 seamless_drrs_min_refresh_rate;
>  	enum drrs_type drrs_type;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 081e52dd6c4e..04250a0fec3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -15,19 +15,29 @@ bool intel_vrr_is_capable(struct intel_connector *connector)
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct intel_dp *intel_dp;
>  
> -	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> -	    connector->base.connector_type != DRM_MODE_CONNECTOR_DisplayPort)
> -		return false;
> -
> -	intel_dp = intel_attached_dp(connector);
>  	/*
>  	 * DP Sink is capable of VRR video timings if
>  	 * Ignore MSA bit is set in DPCD.
>  	 * EDID monitor range also should be atleast 10 for reasonable
>  	 * Adaptive Sync or Variable Refresh Rate end user experience.
>  	 */
> +	switch (connector->base.connector_type) {
> +	case DRM_MODE_CONNECTOR_eDP:
> +		if (!connector->panel.vbt.vrr)
> +			return false;
> +		fallthrough;
> +	case DRM_MODE_CONNECTOR_DisplayPort:
> +		intel_dp = intel_attached_dp(connector);
> +
> +		if (!drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd))
> +			return false;
> +
> +		break;
> +	default:
> +		return false;
> +	}
> +
>  	return HAS_VRR(i915) &&

Feels like !HAS_VRR() should be an early return at the top. But that's
not part of this patch.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> -		drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) &&
>  		info->monitor_range.max_vfreq - info->monitor_range.min_vfreq > 10;
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center