From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id q1sm2716627wmd.6.2017.02.03.04.07.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 Feb 2017 04:07:34 -0800 (PST) Received: from zen (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTPS id 50DE43E0126; Fri, 3 Feb 2017 12:07:39 +0000 (GMT) References: <20170201150553.9381-1-alex.bennee@linaro.org> <20170201150553.9381-26-alex.bennee@linaro.org> User-agent: mu4e 0.9.19; emacs 25.1.91.7 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Peter Maydell Cc: MTTCG Devel , QEMU Developers , KONRAD =?utf-8?B?RnLDqWTDqXJpYw==?= , Alvise Rigo , "Emilio G. Cota" , Pranith Kumar , Nikunj A Dadhania , Mark Burton , Paolo Bonzini , Jan Kiszka , Fedorov Sergey , Richard Henderson , Bamvor Zhang Jian , Peter Crosthwaite , "open list\:ARM" Subject: Re: [PATCH v9 25/25] tcg: enable MTTCG by default for ARM on x86 hosts In-reply-to: Date: Fri, 03 Feb 2017 12:07:39 +0000 Message-ID: <87r33ffpf8.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-TUID: zNdvmxtXSM4a Peter Maydell writes: > On 1 February 2017 at 15:05, Alex Bennée wrote: >> This enables the multi-threaded system emulation by default for ARMv7 >> and ARMv8 guests using the x86_64 TCG backend. This is because on the >> guest side: >> >> - The ARM translate.c/translate-64.c have been converted to >> - use MTTCG safe atomic primitives >> - emit the appropriate barrier ops >> - The ARM machine has been updated to >> - hold the BQL when modifying shared cross-vCPU state >> - defer cpu_reset to async safe work >> >> All the host backends support the barrier and atomic primitives but >> need to provide same-or-better support for normal load/store >> operations. > >> diff --git a/cpus.c b/cpus.c >> index e3d9f3fe21..e1b82bcd49 100644 >> --- a/cpus.c >> +++ b/cpus.c >> @@ -176,8 +176,8 @@ bool mttcg_enabled; >> >> static bool check_tcg_memory_orders_compatible(void) >> { >> -#if defined(TCG_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO) >> - return (TCG_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0; >> +#if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO) >> + return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0; > > This looks like maybe something that should have been squashed > into an earlier part of the patchset? Good catch. I shall fix that up. > >> #else >> return false; >> #endif >> diff --git a/target/arm/cpu.h b/target/arm/cpu.h >> index a3c4d07817..0ef31db3e0 100644 >> --- a/target/arm/cpu.h >> +++ b/target/arm/cpu.h >> @@ -30,6 +30,9 @@ >> # define TARGET_LONG_BITS 32 >> #endif >> >> +/* ARM processors have a weak memory model */ >> +#define TCG_GUEST_DEFAULT_MO (0) > > Do you need the () ? > > > That said, if Richard is happy with turning this on then > I'm happy to do so. > > Acked-by: Peter Maydell > > thanks > -- PMM -- Alex Bennée From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49167) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZceR-0005vw-VQ for qemu-devel@nongnu.org; Fri, 03 Feb 2017 07:07:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cZceO-0004Uz-RE for qemu-devel@nongnu.org; Fri, 03 Feb 2017 07:07:39 -0500 Received: from mail-wm0-x232.google.com ([2a00:1450:400c:c09::232]:35531) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cZceO-0004U1-K3 for qemu-devel@nongnu.org; Fri, 03 Feb 2017 07:07:36 -0500 Received: by mail-wm0-x232.google.com with SMTP id b65so25716889wmf.0 for ; Fri, 03 Feb 2017 04:07:36 -0800 (PST) References: <20170201150553.9381-1-alex.bennee@linaro.org> <20170201150553.9381-26-alex.bennee@linaro.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: Date: Fri, 03 Feb 2017 12:07:39 +0000 Message-ID: <87r33ffpf8.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v9 25/25] tcg: enable MTTCG by default for ARM on x86 hosts List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: MTTCG Devel , QEMU Developers , KONRAD =?utf-8?B?RnLDqWTDqXJpYw==?= , Alvise Rigo , "Emilio G. Cota" , Pranith Kumar , Nikunj A Dadhania , Mark Burton , Paolo Bonzini , Jan Kiszka , Fedorov Sergey , Richard Henderson , Bamvor Zhang Jian , Peter Crosthwaite , "open list:ARM" Peter Maydell writes: > On 1 February 2017 at 15:05, Alex Bennée wrote: >> This enables the multi-threaded system emulation by default for ARMv7 >> and ARMv8 guests using the x86_64 TCG backend. This is because on the >> guest side: >> >> - The ARM translate.c/translate-64.c have been converted to >> - use MTTCG safe atomic primitives >> - emit the appropriate barrier ops >> - The ARM machine has been updated to >> - hold the BQL when modifying shared cross-vCPU state >> - defer cpu_reset to async safe work >> >> All the host backends support the barrier and atomic primitives but >> need to provide same-or-better support for normal load/store >> operations. > >> diff --git a/cpus.c b/cpus.c >> index e3d9f3fe21..e1b82bcd49 100644 >> --- a/cpus.c >> +++ b/cpus.c >> @@ -176,8 +176,8 @@ bool mttcg_enabled; >> >> static bool check_tcg_memory_orders_compatible(void) >> { >> -#if defined(TCG_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO) >> - return (TCG_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0; >> +#if defined(TCG_GUEST_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO) >> + return (TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0; > > This looks like maybe something that should have been squashed > into an earlier part of the patchset? Good catch. I shall fix that up. > >> #else >> return false; >> #endif >> diff --git a/target/arm/cpu.h b/target/arm/cpu.h >> index a3c4d07817..0ef31db3e0 100644 >> --- a/target/arm/cpu.h >> +++ b/target/arm/cpu.h >> @@ -30,6 +30,9 @@ >> # define TARGET_LONG_BITS 32 >> #endif >> >> +/* ARM processors have a weak memory model */ >> +#define TCG_GUEST_DEFAULT_MO (0) > > Do you need the () ? > > > That said, if Richard is happy with turning this on then > I'm happy to do so. > > Acked-by: Peter Maydell > > thanks > -- PMM -- Alex Bennée