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b=PRmRUoPdQz5qV+0cRmm79r2xzZbb86tSAAwBJHXco1QDOj8nG0CxHVkgolGKrVB5AWVljK61akdvD6gTjRi6LwEN0xlzcTopM8SB/XNN8SdOAlREpCgx7dvrpmQLSEFprmDKhgQSC63c5kfp9GoNZ2XrvL+gAv3mwQzSlnA0qmtcTFp1wf71ituRm7LmcLczRwQZRFrd82iV8IasQ5SpH4gNQTGWcsxb6QAFpmvUX27SZBZXRp77uMkreyVnkaGskwkj3oDtCzcIeD0tDYn4oAhN/ylSDz61lC7lk7T+RNKP9aMHvUk5Nk1KTKsZpjfK3qjV92VihxwqfRxHgqyk3A== From: Volodymyr Babchuk To: Mykola Kvach CC: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Andrew Cooper , Anthony PERARD , Jan Beulich , =?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Jens Wiklander Subject: Re: [PATCH v6 1/4] xen/arm: handle irq_set_type() failures Thread-Topic: [PATCH v6 1/4] xen/arm: handle irq_set_type() failures Thread-Index: AQHdUDM172HH4zh0KU2n7bf3fDWjHw== Date: Tue, 13 Oct 2026 02:31:10 +0000 Message-ID: <87se2awcuq.fsf@epam.com> References: <1cc5a52b61d3ed8176b2a12f23f284a44a8a72d8.1790699282.git.mykola_kvach@epam.com> In-Reply-To: <1cc5a52b61d3ed8176b2a12f23f284a44a8a72d8.1790699282.git.mykola_kvach@epam.com> (Mykola Kvach's message of "Tue, 29 Sep 2026 19:54:09 +0300") Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: mu4e 1.14.3; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VE1PR03MB6078.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2d98a68c-816f-4dbc-245c-08df28d20afe X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Oct 2026 02:31:10.2114 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: BHsnS9sZiAJoAqedbd3fQkXaGdQTn+5cpGpOC/n5Udkh4IRGIBVIDN/sbF0HkjirXk5cOCnpb/XghPxWHgGCqriOKF4SS9PbFqVXRsZ+cw8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR03MB7131 X-purgate-ID: tlsNG-720697/1791858673-672B12AC-91AB7E82/0/0 X-purgate-type: clean X-purgate-size: 9252 Hi Mykola, Mykola Kvach writes: > Several Arm firmware initialization paths discard irq_set_type()'s return > value, violating MISRA C Rule 17.7. If trigger configuration fails, > initialization continues with an IRQ that was not configured as requested= . > > GTDT and MADT retain rejected timer and maintenance INTIDs. > check_timer_irq_cfg() and release_irq() later perform unconditional > descriptor lookups on those values. Xen has no backing descriptors for > INTIDs 1024 through 4095, so retaining one can cause an out-of-bounds > access. > > Check the return value in the GTDT, MADT, SPCR, and FF-A paths. Store tim= er > INTIDs only after successful trigger configuration, make GTDT parsing > failure fatal, and stop notification setup when trigger configuration > fails. Keep the NS16550 and PL011 consoles available by falling back to > polling, with a warning, if their IRQ trigger configuration fails. > > Signed-off-by: Mykola Kvach > Reviewed-by: Michal Orzel Not sure that this is a good idea to leave R-b tags if you are doing functional changes to the patches. You can have my R-b though: Reviewed-by: Volodymyr Babchuk > --- > Changes in v6: > - Fall back to polling with a warning when ACPI IRQ configuration fails > for NS16550 or PL011, preserving the console. > > Changes in v3: > - Avoid partial state updates and simplify maintenance IRQ setup. > > Changes in v2: > - New patch. > --- > xen/arch/arm/gic-v2.c | 15 +++++++++------ > xen/arch/arm/gic-v3.c | 15 +++++++++------ > xen/arch/arm/tee/ffa_notif.c | 10 +++++++++- > xen/arch/arm/time.c | 18 ++++++++++++++---- > xen/drivers/char/ns16550.c | 8 +++++++- > xen/drivers/char/pl011.c | 12 ++++++++++-- > 6 files changed, 58 insertions(+), 20 deletions(-) > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > index d05c574d88..87eda9d322 100644 > --- a/xen/arch/arm/gic-v2.c > +++ b/xen/arch/arm/gic-v2.c > @@ -1166,17 +1166,20 @@ gic_acpi_parse_madt_cpu(struct acpi_subtable_head= er *header, > /* Read from APIC table and fill up the GIC variables */ > if ( cpu_base_assigned =3D=3D 0 ) > { > + int rc; > + > + rc =3D irq_set_type(processor->vgic_interrupt, > + processor->flags & ACPI_MADT_VGIC_IRQ_MODE ? > + IRQ_TYPE_EDGE_BOTH : IRQ_TYPE_LEVEL_MASK); > + > + if ( rc ) > + return rc; > + > cbase =3D processor->base_address; > csize =3D SZ_8K; > hbase =3D processor->gich_base_address; > vbase =3D processor->gicv_base_address; > gicv2_info.maintenance_irq =3D processor->vgic_interrupt; > - > - if ( processor->flags & ACPI_MADT_VGIC_IRQ_MODE ) > - irq_set_type(gicv2_info.maintenance_irq, IRQ_TYPE_EDGE_BOTH)= ; > - else > - irq_set_type(gicv2_info.maintenance_irq, IRQ_TYPE_LEVEL_MASK= ); > - > cpu_base_assigned =3D 1; > } > else > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index acdac22953..b32a9b5009 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -1743,15 +1743,18 @@ gic_acpi_parse_madt_cpu(struct acpi_subtable_head= er *header, > /* Read from APIC table and fill up the GIC variables */ > if ( !cpu_base_assigned ) > { > + int rc; > + > + rc =3D irq_set_type(processor->vgic_interrupt, > + processor->flags & ACPI_MADT_VGIC_IRQ_MODE ? > + IRQ_TYPE_EDGE_BOTH : IRQ_TYPE_LEVEL_MASK); > + > + if ( rc ) > + return rc; > + > cbase =3D processor->base_address; > vbase =3D processor->gicv_base_address; > gicv3_info.maintenance_irq =3D processor->vgic_interrupt; > - > - if ( processor->flags & ACPI_MADT_VGIC_IRQ_MODE ) > - irq_set_type(gicv3_info.maintenance_irq, IRQ_TYPE_EDGE_BOTH)= ; > - else > - irq_set_type(gicv3_info.maintenance_irq, IRQ_TYPE_LEVEL_MASK= ); > - > cpu_base_assigned =3D 1; > } > else > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c > index 186e726412..c64bc39f03 100644 > --- a/xen/arch/arm/tee/ffa_notif.c > +++ b/xen/arch/arm/tee/ffa_notif.c > @@ -407,7 +407,15 @@ void ffa_notif_init(void) > irq =3D resp.a2; > notif_sri_irq =3D irq; > if ( irq >=3D NR_GIC_SGI ) > - irq_set_type(irq, IRQ_TYPE_EDGE_RISING); > + { > + ret =3D irq_set_type(irq, IRQ_TYPE_EDGE_RISING); > + if ( ret ) > + { > + printk(XENLOG_ERR "ffa: irq_set_type irq %u failed: erro= r %d\n", > + irq, ret); > + return; > + } > + } > ret =3D request_irq(irq, 0, notif_irq_handler, "FF-A notif", NUL= L); > if ( ret ) > { > diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c > index be54b87438..ccfb76e20f 100644 > --- a/xen/arch/arm/time.c > +++ b/xen/arch/arm/time.c > @@ -60,20 +60,27 @@ static int __init arch_timer_acpi_init(struct acpi_ta= ble_header *header) > { > u32 irq_type; > struct acpi_table_gtdt *gtdt; > + int rc; > =20 > gtdt =3D container_of(header, struct acpi_table_gtdt, header); > =20 > /* Initialize all the generic timer IRQ variable from GTDT table */ > irq_type =3D acpi_get_timer_irq_type(gtdt->non_secure_el1_flags); > - irq_set_type(gtdt->non_secure_el1_interrupt, irq_type); > + rc =3D irq_set_type(gtdt->non_secure_el1_interrupt, irq_type); > + if ( rc ) > + return rc; > timer_irq[TIMER_PHYS_NONSECURE_PPI] =3D gtdt->non_secure_el1_interru= pt; > =20 > irq_type =3D acpi_get_timer_irq_type(gtdt->virtual_timer_flags); > - irq_set_type(gtdt->virtual_timer_interrupt, irq_type); > + rc =3D irq_set_type(gtdt->virtual_timer_interrupt, irq_type); > + if ( rc ) > + return rc; > timer_irq[TIMER_VIRT_PPI] =3D gtdt->virtual_timer_interrupt; > =20 > irq_type =3D acpi_get_timer_irq_type(gtdt->non_secure_el2_flags); > - irq_set_type(gtdt->non_secure_el2_interrupt, irq_type); > + rc =3D irq_set_type(gtdt->non_secure_el2_interrupt, irq_type); > + if ( rc ) > + return rc; > timer_irq[TIMER_HYP_PPI] =3D gtdt->non_secure_el2_interrupt; > =20 > return 0; > @@ -81,7 +88,10 @@ static int __init arch_timer_acpi_init(struct acpi_tab= le_header *header) > =20 > static void __init preinit_acpi_xen_time(void) > { > - acpi_table_parse(ACPI_SIG_GTDT, arch_timer_acpi_init); > + int rc =3D acpi_table_parse(ACPI_SIG_GTDT, arch_timer_acpi_init); > + > + if ( rc ) > + panic("Timer: Failed to configure interrupts from GTDT: %d\n", r= c); > } > #else > static void __init preinit_acpi_xen_time(void) { } > diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c > index 593d208483..cdda28879e 100644 > --- a/xen/drivers/char/ns16550.c > +++ b/xen/drivers/char/ns16550.c > @@ -1990,8 +1990,14 @@ static int __init ns16550_acpi_uart_init(const voi= d *data) > uart->reg_width =3D spcr->serial_port.access_width; > =20 > /* The trigger/polarity information is not available in spcr. */ > - irq_set_type(spcr->interrupt, IRQ_TYPE_LEVEL_HIGH); > uart->irq =3D spcr->interrupt; > + if ( irq_set_type(spcr->interrupt, IRQ_TYPE_LEVEL_HIGH) ) > + { > + printk(XENLOG_WARNING > + "ns16550: unable to configure IRQ %u, using polling\n", > + spcr->interrupt); > + uart->irq =3D 0; > + } > =20 > uart->vuart.base_addr =3D uart->io_base; > uart->vuart.size =3D uart->io_size; > diff --git a/xen/drivers/char/pl011.c b/xen/drivers/char/pl011.c > index a336241033..612d457fe0 100644 > --- a/xen/drivers/char/pl011.c > +++ b/xen/drivers/char/pl011.c > @@ -347,6 +347,7 @@ static int __init pl011_acpi_uart_init(const void *da= ta) > { > acpi_status status; > struct acpi_table_spcr *spcr =3D NULL; > + unsigned int irq; > int res; > bool sbsa; > =20 > @@ -363,10 +364,17 @@ static int __init pl011_acpi_uart_init(const void *= data) > spcr->interface_type =3D=3D ACPI_DBG2_SBSA_32); > =20 > /* trigger/polarity information is not available in spcr */ > - irq_set_type(spcr->interrupt, IRQ_TYPE_LEVEL_HIGH); > + irq =3D spcr->interrupt; > + if ( irq_set_type(irq, IRQ_TYPE_LEVEL_HIGH) ) > + { > + printk(XENLOG_WARNING > + "pl011: unable to configure IRQ %u, using polling\n", > + irq); > + irq =3D 0; > + } > =20 > /* TODO - mmio32 proper handling (for now set to true) */ > - res =3D pl011_uart_init(spcr->interrupt, spcr->serial_port.address, > + res =3D pl011_uart_init(irq, spcr->serial_port.address, > PAGE_SIZE, sbsa, true); > if ( res < 0 ) > { --=20 WBR, Volodymyr=