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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/dsc: Move rc param calculation for native_420
Date: Tue, 23 May 2023 14:44:33 +0300	[thread overview]
Message-ID: <87sfbnl1b2.fsf@intel.com> (raw)
In-Reply-To: <20230523101651.1282681-2-suraj.kandpal@intel.com>

On Tue, 23 May 2023, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Move rc_param calculation for native_420 into calculate_rc_parameter.

Why?

Please always answer the question "why" in the commit message, even if
briefly.

>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vdsc.c | 28 +++++++++++++----------
>  1 file changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index bd9116d2cd76..c64a38363e02 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -78,6 +78,22 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
>  	else
>  		vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
>  
> +	/* According to DSC 1.2 specs in Section 4.1 if native_420 is set:
> +	 * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice
> +	 * height < 8.
> +	 * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma
> +	 * preservation in second line.
> +	 */
> +	if (vdsc_cfg->native_420) {
> +		if (vdsc_cfg->slice_height >= 8)
> +			vdsc_cfg->second_line_bpg_offset = 12;
> +		else
> +			vdsc_cfg->second_line_bpg_offset =
> +				2 * (vdsc_cfg->slice_height - 1);
> +
> +		vdsc_cfg->second_line_offset_adj = 512;
> +	}
> +
>  	/* Our hw supports only 444 modes as of today */
>  	if (bpp >= 12)
>  		vdsc_cfg->initial_offset = 2048;
> @@ -192,24 +208,12 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)
>  	/*
>  	 * According to DSC 1.2 specs in Section 4.1 if native_420 is set:
>  	 * -We need to double the current bpp.
> -	 * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice
> -	 * height < 8.
> -	 * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma
> -	 * preservation in second line.
>  	 * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded
>  	 * up to 16 fractional bits, we left shift second line offset by 11 to preserve 11
>  	 * fractional bits.
>  	 */
>  	if (vdsc_cfg->native_420) {
>  		vdsc_cfg->bits_per_pixel <<= 1;
> -
> -		if (vdsc_cfg->slice_height >= 8)
> -			vdsc_cfg->second_line_bpg_offset = 12;
> -		else
> -			vdsc_cfg->second_line_bpg_offset =
> -				2 * (vdsc_cfg->slice_height - 1);
> -
> -		vdsc_cfg->second_line_offset_adj = 512;
>  		vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11,
>  							vdsc_cfg->slice_height - 1);
>  	}

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2023-05-23 11:44 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-23 10:16 [Intel-gfx] [PATCH 0/2] Add rc_range_params for YUV420 Suraj Kandpal
2023-05-23 10:16 ` [Intel-gfx] [PATCH 1/2] drm/i915/dsc: Move rc param calculation for native_420 Suraj Kandpal
2023-05-23 11:44   ` Jani Nikula [this message]
2023-05-24  2:55   ` [Intel-gfx] [PATCH v2 " Suraj Kandpal
2023-06-23 10:59     ` Nautiyal, Ankit K
2023-05-23 10:16 ` [Intel-gfx] [PATCH 2/2] drm/i915/dsc: Add rc_range_parameter calculation for YCBCR420 Suraj Kandpal
2023-05-25 11:41   ` [Intel-gfx] [PATCH v2 " Suraj Kandpal
2023-05-23 21:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add rc_range_params for YUV420 Patchwork
2023-05-23 23:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-05-24  3:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add rc_range_params for YUV420 (rev2) Patchwork
2023-05-24 14:38 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-05-25 19:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add rc_range_params for YUV420 (rev3) Patchwork
2023-05-26  5:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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