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Wed, 10 Jun 2020 09:37:57 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0767A11386A6; Wed, 10 Jun 2020 11:37:56 +0200 (CEST) From: Markus Armbruster To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Subject: Re: [PATCH RESEND v3 56/58] qdev: Convert bus-less devices to qdev_realize() with Coccinelle References: <20200610053247.1583243-1-armbru@redhat.com> <20200610053247.1583243-57-armbru@redhat.com> <0a4e8a47-5d11-0864-8ad8-700922d08712@redhat.com> Date: Wed, 10 Jun 2020 11:37:55 +0200 In-Reply-To: <0a4e8a47-5d11-0864-8ad8-700922d08712@redhat.com> ("Philippe =?utf-8?Q?Mathieu-Daud=C3=A9=22's?= message of "Wed, 10 Jun 2020 10:21:05 +0200") Message-ID: <87sgf3feh8.fsf@dusky.pond.sub.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=207.211.31.120; envelope-from=armbru@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/09 21:17:20 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Alistair Francis , qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Philippe Mathieu-Daud=C3=A9 writes: > Hi Markus, Peter. > > On 6/10/20 7:32 AM, Markus Armbruster wrote: >> All remaining conversions to qdev_realize() are for bus-less devices. >> Coccinelle script: >>=20 >> // only correct for bus-less @dev! >>=20 >> @@ >> expression errp; >> expression dev; >> @@ >> - qdev_init_nofail(dev); >> + qdev_realize(dev, NULL, &error_fatal); >>=20 >> @ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c= ")@ >> expression errp; >> expression dev; >> symbol true; >> @@ >> - object_property_set_bool(OBJECT(dev), true, "realized", errp); >> + qdev_realize(DEVICE(dev), NULL, errp); >>=20 >> @ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c= ")@ >> expression errp; >> expression dev; >> symbol true; >> @@ >> - object_property_set_bool(dev, true, "realized", errp); >> + qdev_realize(DEVICE(dev), NULL, errp); > > Finally. Now my ealier suggestion is easier to explain: > Rename qdev_realize() -> sysbus_realize(), extracting the qdev_realize() > part. qdev_realize() doesn't take a Bus argument anymore. > Left for later. I'm still confused. Cases: * Devices that plug into a bus: use qdev_realize() passing that bus. If there is a bus-specific wrapper, use that, for legibility. In particular, use sysbus_realize() for sysbus devices plugging into the main system bus. * Devices that don't plug into a bus: use qdev_realize() passing a null bus. What would you like me to improve here? > >>=20 >> Note that Coccinelle chokes on ARMSSE typedef vs. macro in >> hw/arm/armsse.c. Worked around by temporarily renaming the macro for >> the spatch run. >>=20 >> Signed-off-by: Markus Armbruster >> Acked-by: Alistair Francis >> Reviewed-by: Paolo Bonzini >> --- >> hw/arm/allwinner-a10.c | 2 +- >> hw/arm/allwinner-h3.c | 2 +- >> hw/arm/armsse.c | 20 ++++++--------- >> hw/arm/armv7m.c | 2 +- >> hw/arm/aspeed.c | 3 +-- >> hw/arm/aspeed_ast2600.c | 2 +- >> hw/arm/aspeed_soc.c | 2 +- >> hw/arm/bcm2836.c | 3 +-- >> hw/arm/cubieboard.c | 2 +- >> hw/arm/digic.c | 2 +- >> hw/arm/digic_boards.c | 2 +- >> hw/arm/exynos4210.c | 4 +-- >> hw/arm/fsl-imx25.c | 2 +- >> hw/arm/fsl-imx31.c | 2 +- >> hw/arm/fsl-imx6.c | 2 +- >> hw/arm/fsl-imx6ul.c | 3 +-- >> hw/arm/fsl-imx7.c | 2 +- >> hw/arm/highbank.c | 2 +- >> hw/arm/imx25_pdk.c | 2 +- >> hw/arm/integratorcp.c | 2 +- >> hw/arm/kzm.c | 2 +- >> hw/arm/mcimx6ul-evk.c | 2 +- >> hw/arm/mcimx7d-sabre.c | 2 +- >> hw/arm/mps2-tz.c | 9 +++---- >> hw/arm/mps2.c | 7 +++--- >> hw/arm/musca.c | 6 ++--- >> hw/arm/orangepi.c | 2 +- >> hw/arm/raspi.c | 2 +- >> hw/arm/realview.c | 2 +- >> hw/arm/sabrelite.c | 2 +- >> hw/arm/sbsa-ref.c | 2 +- >> hw/arm/stm32f205_soc.c | 2 +- >> hw/arm/stm32f405_soc.c | 2 +- >> hw/arm/versatilepb.c | 2 +- >> hw/arm/vexpress.c | 2 +- >> hw/arm/virt.c | 2 +- >> hw/arm/xilinx_zynq.c | 2 +- >> hw/arm/xlnx-versal.c | 2 +- >> hw/arm/xlnx-zcu102.c | 2 +- >> hw/arm/xlnx-zynqmp.c | 10 +++----- > > Peter you might want to skim at the changes (other > ARM devices out of hw/arm/ involved) but to resume > basically these types are not SysBusDev: > > - cpu > - soc / container > - or-gate / irq-splitter > > I reviewed all of them. > > Next is for Markus. > >> hw/char/serial-isa.c | 2 +- >> hw/char/serial-pci-multi.c | 2 +- >> hw/char/serial-pci.c | 2 +- >> hw/char/serial.c | 4 +-- > > I need to review again hw/char/serial-isa.c, it is > not clear why it is a container and not a SysBusDevice. TYPE_SERIAL is a bus-less TYPE_DEVICE. TYPE_ISA_SERIAL is its adapter for the ISA bus. It contains one TYPE_SERIAL child. TYPE_SERIAL_MM is its adapter for the sysbus pseudo-bus. It contains one TYPE_SERIAL child. TYPE_PCI_SERIAL, "pci-serial-2x", "pci-serial-4x" are adapters for the PCI bus. They contain one, two and four TYPE_SERIAL respectively. Exemplary use of QOM, I think. >> hw/ide/microdrive.c | 3 ++- > > I never had to look at the PCMCIA devices, they seem > an unfinished attempt to plug a the devices on a bus. > Maybe it is finished, but the code is not clear (and > not documented). I need more time to review. > >> hw/intc/pnv_xive.c | 4 +-- >> hw/intc/spapr_xive.c | 4 +-- >> hw/intc/xics.c | 2 +- >> hw/intc/xive.c | 2 +- >> hw/pci-host/pnv_phb3.c | 6 ++--- >> hw/pci-host/pnv_phb4.c | 2 +- >> hw/pci-host/pnv_phb4_pec.c | 2 +- >> hw/pci-host/prep.c | 3 +-- >> hw/ppc/pnv.c | 32 ++++++++++-------------- >> hw/ppc/pnv_bmc.c | 2 +- >> hw/ppc/pnv_core.c | 2 +- >> hw/ppc/pnv_psi.c | 4 +-- >> hw/ppc/spapr.c | 5 ++-- >> hw/ppc/spapr_cpu_core.c | 2 +- >> hw/ppc/spapr_drc.c | 2 +- >> hw/ppc/spapr_iommu.c | 2 +- >> hw/ppc/spapr_irq.c | 2 +- > > Wow, lot of QOM code for PPC hardware. Not all clear > yet, in particular the pci-host devices. Apparently > a LPC bus in the middle. Need a bit more time. > >> hw/s390x/s390-skeys.c | 2 +- >> hw/s390x/s390-stattrib.c | 2 +- >> hw/s390x/s390-virtio-ccw.c | 4 +-- >> hw/s390x/sclp.c | 2 +- >> hw/s390x/tod.c | 2 +- > > Eh, odd s390x stuff. No clue, I might review it too. > >> target/i386/cpu.c | 3 +-- > > What is this APIC stuff doing burried with TCG?... > > All the rest that is elided and not commented is reviewed. > > When do you plan to send a pullreq? I want to get this wrapped as quickly as possible; rebasing has been quite a time sink. But not at the price of rushed review.