From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 07/10] softfloat: Inline float64 compare specializations
Date: Tue, 19 May 2020 10:41:06 +0100 [thread overview]
Message-ID: <87sgfwi7nx.fsf@linaro.org> (raw)
In-Reply-To: <20200515190153.6017-8-richard.henderson@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> Replace the float64 compare specializations with inline functions
> that call the standard float64_compare{,_quiet} functions.
> Use bool as the return type.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat.h | 49 ++++++--
> fpu/softfloat.c | 220 ----------------------------------
> target/s390x/vec_fpu_helper.c | 2 +-
> 3 files changed, 42 insertions(+), 229 deletions(-)
👋👏
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index 4d1af6ab45..281f0fd971 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -532,14 +532,6 @@ float64 float64_rem(float64, float64, float_status *status);
> float64 float64_muladd(float64, float64, float64, int, float_status *status);
> float64 float64_sqrt(float64, float_status *status);
> float64 float64_log2(float64, float_status *status);
> -int float64_eq(float64, float64, float_status *status);
> -int float64_le(float64, float64, float_status *status);
> -int float64_lt(float64, float64, float_status *status);
> -int float64_unordered(float64, float64, float_status *status);
> -int float64_eq_quiet(float64, float64, float_status *status);
> -int float64_le_quiet(float64, float64, float_status *status);
> -int float64_lt_quiet(float64, float64, float_status *status);
> -int float64_unordered_quiet(float64, float64, float_status *status);
> FloatRelation float64_compare(float64, float64, float_status *status);
> FloatRelation float64_compare_quiet(float64, float64, float_status *status);
> float64 float64_min(float64, float64, float_status *status);
> @@ -615,6 +607,47 @@ static inline float64 float64_set_sign(float64 a, int sign)
> | ((int64_t)sign << 63));
> }
>
> +static inline bool float64_eq(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool float64_le(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool float64_lt(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool float64_unordered(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare(a, b, s) == float_relation_unordered;
> +}
> +
> +static inline bool float64_eq_quiet(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) == float_relation_equal;
> +}
> +
> +static inline bool float64_le_quiet(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) <= float_relation_equal;
> +}
> +
> +static inline bool float64_lt_quiet(float64 a, float64 b, float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) < float_relation_equal;
> +}
> +
> +static inline bool float64_unordered_quiet(float64 a, float64 b,
> + float_status *s)
> +{
> + return float64_compare_quiet(a, b, s) == float_relation_unordered;
> +}
> +
> #define float64_zero make_float64(0)
> #define float64_half make_float64(0x3fe0000000000000LL)
> #define float64_one make_float64(0x3ff0000000000000LL)
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index f6bfc40c97..5d7fc2c17a 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -4941,226 +4941,6 @@ float64 float64_log2(float64 a, float_status *status)
> return normalizeRoundAndPackFloat64(zSign, 0x408, zSig, status);
> }
>
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is equal to the
> -| corresponding value `b', and 0 otherwise. The invalid exception is raised
> -| if either operand is a NaN. Otherwise, the comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_eq(float64 a, float64 b, float_status *status)
> -{
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - av = float64_val(a);
> - bv = float64_val(b);
> - return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than or
> -| equal to the corresponding value `b', and 0 otherwise. The invalid
> -| exception is raised if either operand is a NaN. The comparison is performed
> -| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_le(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> - return ( av == bv ) || ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than
> -| the corresponding value `b', and 0 otherwise. The invalid exception is
> -| raised if either operand is a NaN. The comparison is performed according
> -| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_lt(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> -
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
> - return ( av != bv ) && ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point values `a' and `b' cannot
> -| be compared, and 0 otherwise. The invalid exception is raised if either
> -| operand is a NaN. The comparison is performed according to the IEC/IEEE
> -| Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_unordered(float64 a, float64 b, float_status *status)
> -{
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - float_raise(float_flag_invalid, status);
> - return 1;
> - }
> - return 0;
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is equal to the
> -| corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
> -| exception.The comparison is performed according to the IEC/IEEE Standard
> -| for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_eq_quiet(float64 a, float64 b, float_status *status)
> -{
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - av = float64_val(a);
> - bv = float64_val(b);
> - return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than or
> -| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not
> -| cause an exception. Otherwise, the comparison is performed according to the
> -| IEC/IEEE Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_le_quiet(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
> - return ( av == bv ) || ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point value `a' is less than
> -| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an
> -| exception. Otherwise, the comparison is performed according to the IEC/IEEE
> -| Standard for Binary Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_lt_quiet(float64 a, float64 b, float_status *status)
> -{
> - bool aSign, bSign;
> - uint64_t av, bv;
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 0;
> - }
> - aSign = extractFloat64Sign( a );
> - bSign = extractFloat64Sign( b );
> - av = float64_val(a);
> - bv = float64_val(b);
> - if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0 );
> - return ( av != bv ) && ( aSign ^ ( av < bv ) );
> -
> -}
> -
> -/*----------------------------------------------------------------------------
> -| Returns 1 if the double-precision floating-point values `a' and `b' cannot
> -| be compared, and 0 otherwise. Quiet NaNs do not cause an exception. The
> -| comparison is performed according to the IEC/IEEE Standard for Binary
> -| Floating-Point Arithmetic.
> -*----------------------------------------------------------------------------*/
> -
> -int float64_unordered_quiet(float64 a, float64 b, float_status *status)
> -{
> - a = float64_squash_input_denormal(a, status);
> - b = float64_squash_input_denormal(b, status);
> -
> - if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
> - || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
> - ) {
> - if (float64_is_signaling_nan(a, status)
> - || float64_is_signaling_nan(b, status)) {
> - float_raise(float_flag_invalid, status);
> - }
> - return 1;
> - }
> - return 0;
> -}
> -
> /*----------------------------------------------------------------------------
> | Returns the result of converting the extended double-precision floating-
> | point value `a' to the 32-bit two's complement integer format. The
> diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c
> index a48bd704bc..c1564e819b 100644
> --- a/target/s390x/vec_fpu_helper.c
> +++ b/target/s390x/vec_fpu_helper.c
> @@ -174,7 +174,7 @@ void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
> env->cc_op = wfc64(v1, v2, env, true, GETPC());
> }
>
> -typedef int (*vfc64_fn)(float64 a, float64 b, float_status *status);
> +typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
> static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
> CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
> {
--
Alex Bennée
next prev parent reply other threads:[~2020-05-19 9:42 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 19:01 [PATCH 00/10] softfloat: misc cleanups Richard Henderson
2020-05-15 19:01 ` [PATCH 01/10] softfloat: Use post test for floatN_mul Richard Henderson
2020-05-19 8:48 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 02/10] softfloat: Replace flag with bool Richard Henderson
2020-05-16 5:27 ` Philippe Mathieu-Daudé
2020-05-19 8:53 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 03/10] softfloat: Change tininess_before_rounding to bool Richard Henderson
2020-05-19 8:55 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 04/10] softfloat: Name rounding mode enum Richard Henderson
2020-05-16 5:30 ` Philippe Mathieu-Daudé
2020-05-19 9:06 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 05/10] softfloat: Name compare relation enum Richard Henderson
2020-05-16 5:32 ` Philippe Mathieu-Daudé
2020-05-19 9:08 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 06/10] softfloat: Inline float32 compare specializations Richard Henderson
2020-05-19 9:38 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 07/10] softfloat: Inline float64 " Richard Henderson
2020-05-19 9:41 ` Alex Bennée [this message]
2020-05-15 19:01 ` [PATCH 08/10] softfloat: Inline float128 " Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 09/10] softfloat: Inline floatx80 " Richard Henderson
2020-05-19 9:41 ` Alex Bennée
2020-05-15 19:01 ` [PATCH 10/10] softfloat: Return bool from all classification predicates Richard Henderson
2020-05-16 5:33 ` Philippe Mathieu-Daudé
2020-05-19 10:10 ` Alex Bennée
2020-05-19 15:47 ` Richard Henderson
2020-05-16 10:58 ` [PATCH 00/10] softfloat: misc cleanups no-reply
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