From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/7] drm/i915: Remove manual save/resume of fence register state
Date: Mon, 16 Mar 2020 09:14:22 +0200 [thread overview]
Message-ID: <87sgi8zs8h.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20200314122058.21472-3-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Since we always reload the fence register state on runtime resume,
> having it explicitly in the S0ix resume code is redundant. Indeed, it
> is not even being used!
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ddd5b40cbbbc..a7ea1d855359 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -539,7 +539,6 @@ struct i915_suspend_saved_registers {
> u32 saveSWF0[16];
> u32 saveSWF1[16];
> u32 saveSWF3[3];
> - u64 saveFENCE[I915_MAX_NUM_FENCES];
> u32 savePCH_PORT_HOTPLUG;
> u16 saveGCDGMBUS;
> };
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2020-03-16 7:15 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-14 12:20 [Intel-gfx] [PATCH 1/7] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
2020-03-14 12:20 ` [Intel-gfx] [PATCH 2/7] drm/i915/gt: Pull restoration of GGTT fences underneath the GT Chris Wilson
2020-03-14 12:20 ` [Intel-gfx] [PATCH 3/7] drm/i915: Remove manual save/resume of fence register state Chris Wilson
2020-03-16 7:14 ` Mika Kuoppala [this message]
2020-03-14 12:20 ` [Intel-gfx] [PATCH 4/7] drm/i915/gt: Allocate i915_fence_reg array Chris Wilson
2020-03-16 7:29 ` Mika Kuoppala
2020-03-16 10:23 ` Chris Wilson
2020-03-16 11:20 ` Mika Kuoppala
2020-03-14 12:20 ` [Intel-gfx] [PATCH 5/7] drm/i915/gt: Store the fence details on the fence Chris Wilson
2020-03-14 12:20 ` [Intel-gfx] [PATCH 6/7] drm/i915/gt: Only wait for GPU activity before unbinding a GGTT fence Chris Wilson
2020-03-14 12:20 ` [Intel-gfx] [PATCH 7/7] drm/i915/gt: Make fence revocation unequivocal Chris Wilson
2020-03-16 7:02 ` [Intel-gfx] [PATCH 1/7] drm/i915: Move GGTT fence registers under gt/ Mika Kuoppala
2020-03-16 15:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] " Patchwork
2020-03-16 16:06 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-16 16:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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