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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Wait for the wa batch to be pinned
Date: Mon, 09 Mar 2020 12:50:45 +0200	[thread overview]
Message-ID: <87sgih3ipm.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20200307122425.29114-1-chris@chris-wilson.co.uk>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Be sure to wait for the vma to be in place before we tell the GPU to
> execute from the wa batch. Since initialisation is mostly synchronous
> (or rather at some point during start up we will need to sync anyway),
> we can affort to do an explicit i915_vma_sync() during wa batch
> construction rather than check for a required await on every context
> switch. (We don't expect to change the wa bb at run time so paying the
> cost once up front seems preferrable.)
>
> Fixes: ee2413eeed76 ("drm/i915: Add mechanism to submit a context WA on ring submission")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_ring_submission.c    | 4 ++++
>  drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 6 ++++++
>  2 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> index 6881317a747e..1424582e4a9b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> @@ -2015,6 +2015,10 @@ static int gen7_ctx_switch_bb_init(struct intel_engine_cs *engine)
>  	if (err)
>  		goto err_private;
>  
> +	err = i915_vma_sync(vma);
> +	if (err)
> +		goto err_unpin;
> +
>  	err = gen7_ctx_switch_bb_setup(engine, vma);
>  	if (err)
>  		goto err_unpin;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
> index fcfddcd2a63d..9995faadd7e8 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c
> @@ -29,6 +29,12 @@ static struct i915_vma *create_wally(struct intel_engine_cs *engine)
>  		return ERR_PTR(err);
>  	}
>  
> +	err = i915_vma_sync(vma);
> +	if (err) {
> +		i915_gem_object_put(obj);
> +		return ERR_PTR(err);
> +	}
> +
>  	cs = i915_gem_object_pin_map(obj, I915_MAP_WC);
>  	if (IS_ERR(cs)) {
>  		i915_gem_object_put(obj);
> -- 
> 2.20.1
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      parent reply	other threads:[~2020-03-09 10:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-07 12:24 [Intel-gfx] [PATCH] drm/i915/gt: Wait for the wa batch to be pinned Chris Wilson
2020-03-07 13:17 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork
2020-03-07 13:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-08  1:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-09 10:50 ` Mika Kuoppala [this message]

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