From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org
Subject: Re: [Qemu-devel] [PATCH v6 28/28] fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan
Date: Wed, 16 May 2018 14:47:59 +0100 [thread overview]
Message-ID: <87sh6rempc.fsf@linaro.org> (raw)
In-Reply-To: <20180515222540.9988-29-richard.henderson@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> Isolate the target-specific choice to 3 functions instead of 6.
>
> The code in floatx80_default_nan tried to be over-general. There are
> only two targets that support this format: x86 and m68k. Thus there
> is no point in inventing a mechanism for snan_bit_is_one.
>
> Move routines that no longer have ifdefs out of softfloat-specialize.h.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> fpu/softfloat-specialize.h | 81 ++------------------------------------
> fpu/softfloat.c | 31 +++++++++++++++
> 2 files changed, 35 insertions(+), 77 deletions(-)
>
> diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
> index ec4fb6ba8b..16c0bcb6fa 100644
> --- a/fpu/softfloat-specialize.h
> +++ b/fpu/softfloat-specialize.h
> @@ -278,24 +278,6 @@ int float16_is_signaling_nan(float16 a_, float_status *status)
> #endif
> }
>
> -/*----------------------------------------------------------------------------
> -| Returns a quiet NaN from a signalling NaN for the half-precision
> -| floating point value `a'.
> -*----------------------------------------------------------------------------*/
> -
> -float16 float16_silence_nan(float16 a, float_status *status)
> -{
> -#ifdef NO_SIGNALING_NANS
> - g_assert_not_reached();
> -#else
> - if (snan_bit_is_one(status)) {
> - return float16_default_nan(status);
> - } else {
> - return a | (1 << 9);
> - }
> -#endif
> -}
> -
> /*----------------------------------------------------------------------------
> | Returns 1 if the single-precision floating-point value `a' is a quiet
> | NaN; otherwise returns 0.
> @@ -334,30 +316,6 @@ int float32_is_signaling_nan(float32 a_, float_status *status)
> #endif
> }
>
> -/*----------------------------------------------------------------------------
> -| Returns a quiet NaN from a signalling NaN for the single-precision
> -| floating point value `a'.
> -*----------------------------------------------------------------------------*/
> -
> -float32 float32_silence_nan(float32 a, float_status *status)
> -{
> -#ifdef NO_SIGNALING_NANS
> - g_assert_not_reached();
> -#else
> - if (snan_bit_is_one(status)) {
> -# ifdef TARGET_HPPA
> - a &= ~0x00400000;
> - a |= 0x00200000;
> - return a;
> -# else
> - return float32_default_nan(status);
> -# endif
> - } else {
> - return a | (1 << 22);
> - }
> -#endif
> -}
> -
> /*----------------------------------------------------------------------------
> | Returns the result of converting the single-precision floating-point NaN
> | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
> @@ -706,31 +664,6 @@ int float64_is_signaling_nan(float64 a_, float_status *status)
> #endif
> }
>
> -/*----------------------------------------------------------------------------
> -| Returns a quiet NaN from a signalling NaN for the double-precision
> -| floating point value `a'.
> -*----------------------------------------------------------------------------*/
> -
> -float64 float64_silence_nan(float64 a, float_status *status)
> -{
> -#ifdef NO_SIGNALING_NANS
> - g_assert_not_reached();
> -#else
> - if (snan_bit_is_one(status)) {
> -# ifdef TARGET_HPPA
> - a &= ~0x0008000000000000ULL;
> - a |= 0x0004000000000000ULL;
> - return a;
> -# else
> - return float64_default_nan(status);
> -# endif
> - } else {
> - return a | LIT64(0x0008000000000000);
> - }
> -#endif
> -}
> -
> -
> /*----------------------------------------------------------------------------
> | Returns the result of converting the double-precision floating-point NaN
> | `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
> @@ -886,16 +819,10 @@ int floatx80_is_signaling_nan(floatx80 a, float_status *status)
>
> floatx80 floatx80_silence_nan(floatx80 a, float_status *status)
> {
> -#ifdef NO_SIGNALING_NANS
> - g_assert_not_reached();
> -#else
> - if (snan_bit_is_one(status)) {
> - return floatx80_default_nan(status);
> - } else {
> - a.low |= LIT64(0xC000000000000000);
> - return a;
> - }
> -#endif
> + /* None of the targets that have snan_bit_is_one use floatx80. */
> + assert(!snan_bit_is_one(status));
> + a.low |= LIT64(0xC000000000000000);
> + return a;
> }
>
> /*----------------------------------------------------------------------------
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index c8b33e35f4..8cd2400081 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -2134,6 +2134,37 @@ float128 float128_default_nan(float_status *status)
> return r;
> }
>
> +/*----------------------------------------------------------------------------
> +| Returns a quiet NaN from a signalling NaN for the floating point value `a'.
> +*----------------------------------------------------------------------------*/
> +
> +float16 float16_silence_nan(float16 a, float_status *status)
> +{
> + FloatParts p = float16_unpack_raw(a);
> + p.frac <<= float16_params.frac_shift;
> + p = parts_silence_nan(p, status);
> + p.frac >>= float16_params.frac_shift;
> + return float16_pack_raw(p);
> +}
> +
> +float32 float32_silence_nan(float32 a, float_status *status)
> +{
> + FloatParts p = float32_unpack_raw(a);
> + p.frac <<= float32_params.frac_shift;
> + p = parts_silence_nan(p, status);
> + p.frac >>= float32_params.frac_shift;
> + return float32_pack_raw(p);
> +}
> +
> +float64 float64_silence_nan(float64 a, float_status *status)
> +{
> + FloatParts p = float64_unpack_raw(a);
> + p.frac <<= float64_params.frac_shift;
> + p = parts_silence_nan(p, status);
> + p.frac >>= float64_params.frac_shift;
> + return float64_pack_raw(p);
> +}
> +
> /*----------------------------------------------------------------------------
> | Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
> | and 7, and returns the properly rounded 32-bit integer corresponding to the
--
Alex Bennée
next prev parent reply other threads:[~2018-05-16 13:48 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-15 22:25 [Qemu-devel] [PATCH v6 00/28] softfloat patch roundup Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 01/28] fpu/softfloat: Fix conversion from uint64 to float128 Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 02/28] fpu/softfloat: Merge NO_SIGNALING_NANS definitions Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 03/28] fpu/softfloat: Split floatXX_silence_nan from floatXX_maybe_silence_nan Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 04/28] fpu/softfloat: Move softfloat-specialize.h below FloatParts definition Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 05/28] fpu/softfloat: Canonicalize NaN fraction Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 06/28] fpu/softfloat: Introduce parts_is_snan_frac Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 07/28] fpu/softfloat: Replace float_class_dnan with parts_default_nan Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 08/28] fpu/softfloat: Replace float_class_msnan with parts_silence_nan Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 09/28] target/arm: convert conversion helpers to fpst/ahp_flag Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 10/28] target/arm: squash FZ16 behaviour for conversions Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 11/28] fpu/softfloat: Partial support for ARM Alternative half-precision Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 12/28] fpu/softfloat: re-factor float to float conversions Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 13/28] target/arm: Use floatX_silence_nan when we have already checked for SNaN Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 14/28] target/arm: Remove floatX_maybe_silence_nan from conversions Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 15/28] target/hppa: " Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 16/28] target/m68k: Use floatX_silence_nan when we have already checked for SNaN Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 17/28] target/mips: Remove floatX_maybe_silence_nan from conversions Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 18/28] target/riscv: " Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 19/28] target/s390x: " Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 20/28] fpu/softfloat: Use float*_silence_nan in propagateFloat*NaN Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 21/28] fpu/softfloat: Remove floatX_maybe_silence_nan Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 22/28] fpu/softfloat: Specialize on snan_bit_is_one Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 23/28] fpu/softfloat: Make is_nan et al available to softfloat-specialize.h Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 24/28] fpu/softfloat: Pass FloatClass to pickNaN Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 25/28] fpu/softfloat: Pass FloatClass to pickNaNMulAdd Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 26/28] fpu/softfloat: Define floatN_default_nan in terms of parts_default_nan Richard Henderson
2018-05-16 13:46 ` Alex Bennée
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 27/28] fpu/softfloat: Clean up parts_default_nan Richard Henderson
2018-05-15 22:25 ` [Qemu-devel] [PATCH v6 28/28] fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan Richard Henderson
2018-05-16 13:47 ` Alex Bennée [this message]
2018-05-16 13:46 ` [Qemu-devel] [PATCH v6 00/28] softfloat patch roundup Alex Bennée
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