From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH V2] drm/i915: relax uncritical udelay_range() Date: Fri, 16 Dec 2016 11:25:14 +0200 Message-ID: <87shpons3p.fsf@intel.com> References: <1481853578-19834-1-git-send-email-hofrat@osadl.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1481853578-19834-1-git-send-email-hofrat@osadl.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Daniel Vetter Cc: David Airlie , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Nicholas Mc Guire List-Id: dri-devel@lists.freedesktop.org T24gRnJpLCAxNiBEZWMgMjAxNiwgTmljaG9sYXMgTWMgR3VpcmUgPGhvZnJhdEBvc2FkbC5vcmc+ IHdyb3RlOgo+IHVkZWxheV9yYW5nZSgxLCAyKSBpcyBpbmVmZmljaWVudCBhbmQgYXMgZGlzY3Vz c2lvbnMgd2l0aCBKYW5pIE5pa3VsYQo+IDxqYW5pLm5pa3VsYUBsaW51eC5pbnRlbC5jb20+IHVu bmVjZXNzYXJ5IGhlcmUuIFRoaXMgcmVwbGFjZXMgdGhpcwo+IHRpZ2h0IHNldHRpbmcgd2l0aCBh IHJlbGF4ZWQgZGVsYXkgb2YgbWluPTIwIGFuZCBtYXg9NTAgd2hpY2ggaGVscHMKPiB0aGUgaHJ0 aW1lciBzdWJzeXN0ZW0gb3B0aW1pemUgdGltZXIgaGFuZGxpbmcuCj4KPiBGaXhlczogY29tbWl0 IGJlNGZjMDQ2YmVkMyAoImRybS9pOTE1OiBhZGQgVkxWIERTSSBQTEwgQ2FsY3VsYXRpb25zIikg Cj4gTGluazogaHR0cDovL2xrbWwub3JnL2xrbWwvMjAxNi8xMi8xNS8xNDcKPiBTaWduZWQtb2Zm LWJ5OiBOaWNob2xhcyBNYyBHdWlyZSA8aG9mcmF0QG9zYWRsLm9yZz4KClB1c2hlZCB0byBkcm0t aW50ZWwtbmV4dC1xdWV1ZWQsIHRoYW5rcyBmb3IgdGhlIHBhdGNoLgoKQlIsCkphbmkuCgo+IC0t LQo+Cj4gVjI6IHVzZSByZWxheGVkIHVzbGVlX3JhbmdlKCkgcmF0aGVyIHRoYW4gdWRlbGF5Cj4g ICAgIGZpeCBkb2N1bWVudGF0aW9uIG9mIGNoYW5nZWQgdGltaW5ncwo+Cj4gUHJvYmxlbSBmb3Vu ZCBieSBjb2NjaW5lbGxlOgo+Cj4gUGF0Y2ggd2FzIGNvbXBpbGUgdGVzdGVkIHdpdGg6IHg4Nl82 NF9kZWZjb25maWcgKGltcGxpZXMgQ09ORklHX0RSTV9JOTE1KQo+Cj4gUGF0Y2ggaXMgYWdhaW5z dCA0LjkuMCAobG9jYWx2ZXJzaW9uLW5leHQgaXMgbmV4dC0yMDE2MTIxNSkKPgo+ICBkcml2ZXJz L2dwdS9kcm0vaTkxNS9pbnRlbF9kc2lfcGxsLmMgfCA2ICsrKystLQo+ICAxIGZpbGUgY2hhbmdl ZCwgNCBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQo+Cj4gZGlmZiAtLWdpdCBhL2RyaXZl cnMvZ3B1L2RybS9pOTE1L2ludGVsX2RzaV9wbGwuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2lu dGVsX2RzaV9wbGwuYwo+IGluZGV4IDU2ZWZmNjAuLmQyMTBiYzQgMTAwNjQ0Cj4gLS0tIGEvZHJp dmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHNpX3BsbC5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJt L2k5MTUvaW50ZWxfZHNpX3BsbC5jCj4gQEAgLTE1Niw4ICsxNTYsMTAgQEAgc3RhdGljIHZvaWQg dmx2X2VuYWJsZV9kc2lfcGxsKHN0cnVjdCBpbnRlbF9lbmNvZGVyICplbmNvZGVyLAo+ICAJdmx2 X2Nja193cml0ZShkZXZfcHJpdiwgQ0NLX1JFR19EU0lfUExMX0NPTlRST0wsCj4gIAkJICAgICAg Y29uZmlnLT5kc2lfcGxsLmN0cmwgJiB+RFNJX1BMTF9WQ09fRU4pOwo+ICAKPiAtCS8qIHdhaXQg YXQgbGVhc3QgMC41IHVzIGFmdGVyIHVuZ2F0aW5nIGJlZm9yZSBlbmFibGluZyBWQ08gKi8KPiAt CXVzbGVlcF9yYW5nZSgxLCAxMCk7Cj4gKwkvKiB3YWl0IGF0IGxlYXN0IDAuNSB1cyBhZnRlciB1 bmdhdGluZyBiZWZvcmUgZW5hYmxpbmcgVkNPLAo+ICsJICogYWxsb3cgaHJ0aW1lciBzdWJzeXN0 ZW0gb3B0aW1pemF0aW9uIGJ5IHJlbGF4aW5nIHRpbWluZwo+ICsJICovCj4gKwl1c2xlZXBfcmFu Z2UoMTAsIDUwKTsKPiAgCj4gIAl2bHZfY2NrX3dyaXRlKGRldl9wcml2LCBDQ0tfUkVHX0RTSV9Q TExfQ09OVFJPTCwgY29uZmlnLT5kc2lfcGxsLmN0cmwpOwoKLS0gCkphbmkgTmlrdWxhLCBJbnRl bCBPcGVuIFNvdXJjZSBUZWNobm9sb2d5IENlbnRlcgpfX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBs aXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1h bi9saXN0aW5mby9pbnRlbC1nZngK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760235AbcLPJZ1 (ORCPT ); Fri, 16 Dec 2016 04:25:27 -0500 Received: from mga09.intel.com ([134.134.136.24]:59133 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754763AbcLPJZS (ORCPT ); Fri, 16 Dec 2016 04:25:18 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,357,1477983600"; d="scan'208";a="798645275" From: Jani Nikula To: Nicholas Mc Guire , Daniel Vetter Cc: Shashank Sharma , ymohanma , David Airlie , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Nicholas Mc Guire Subject: Re: [PATCH V2] drm/i915: relax uncritical udelay_range() In-Reply-To: <1481853578-19834-1-git-send-email-hofrat@osadl.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <1481853578-19834-1-git-send-email-hofrat@osadl.org> Date: Fri, 16 Dec 2016 11:25:14 +0200 Message-ID: <87shpons3p.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 16 Dec 2016, Nicholas Mc Guire wrote: > udelay_range(1, 2) is inefficient and as discussions with Jani Nikula > unnecessary here. This replaces this > tight setting with a relaxed delay of min=20 and max=50 which helps > the hrtimer subsystem optimize timer handling. > > Fixes: commit be4fc046bed3 ("drm/i915: add VLV DSI PLL Calculations") > Link: http://lkml.org/lkml/2016/12/15/147 > Signed-off-by: Nicholas Mc Guire Pushed to drm-intel-next-queued, thanks for the patch. BR, Jani. > --- > > V2: use relaxed uslee_range() rather than udelay > fix documentation of changed timings > > Problem found by coccinelle: > > Patch was compile tested with: x86_64_defconfig (implies CONFIG_DRM_I915) > > Patch is against 4.9.0 (localversion-next is next-20161215) > > drivers/gpu/drm/i915/intel_dsi_pll.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c > index 56eff60..d210bc4 100644 > --- a/drivers/gpu/drm/i915/intel_dsi_pll.c > +++ b/drivers/gpu/drm/i915/intel_dsi_pll.c > @@ -156,8 +156,10 @@ static void vlv_enable_dsi_pll(struct intel_encoder *encoder, > vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, > config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN); > > - /* wait at least 0.5 us after ungating before enabling VCO */ > - usleep_range(1, 10); > + /* wait at least 0.5 us after ungating before enabling VCO, > + * allow hrtimer subsystem optimization by relaxing timing > + */ > + usleep_range(10, 50); > > vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl); -- Jani Nikula, Intel Open Source Technology Center