From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jani Nikula <jani.nikula@linux.intel.com>
Subject: Re: [PATCH] drm/i915: remove redundant (and incorrect!)
	dither enable for VLV
Date: Mon, 22 Apr 2013 11:58:10 +0300
Message-ID: <87sj2jymal.fsf@intel.com>
References: <1366388748-3456-1-git-send-email-jbarnes@virtuousgeek.org>
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To: Jesse Barnes <jbarnes@virtuousgeek.org>, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Fri, 19 Apr 2013, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> We already enable dithering above if needed, and we definitely shouldn't
> be enabling the pipe at this point, so just drop this whole block.

This gets rid of the pipe enabled when expected off backtrace I kept
having.

Tested-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    9 ---------
>  1 file changed, 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 299208d..9f76f76 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4721,15 +4721,6 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
>  		}
>  	}
>  
> -	if (IS_VALLEYVIEW(dev) && intel_pipe_has_type(&intel_crtc->base,
> -						      INTEL_OUTPUT_EDP)) {
> -		if (intel_crtc->config.dither) {
> -			pipeconf |= PIPECONF_6BPC |
> -					PIPECONF_ENABLE |
> -					I965_PIPECONF_ACTIVE;
> -		}
> -	}
> -
>  	if (HAS_PIPE_CXSR(dev)) {
>  		if (intel_crtc->lowfreq_avail) {
>  			DRM_DEBUG_KMS("enabling CxSR downclocking\n");
> -- 
> 1.7.10.4
>
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