From mboxrd@z Thu Jan 1 00:00:00 1970 From: OGAWA Hirofumi Subject: Re: nmi is broken? Date: Thu, 28 Apr 2011 22:44:04 +0900 Message-ID: <87sjt2ij8b.fsf@devron.myhome.or.jp> References: <87sjtbe7fz.fsf@devron.myhome.or.jp> <877hak1t1s.fsf@devron.myhome.or.jp> <4DB3C6D3.9040703@redhat.com> <4DB41696.6060606@web.de> <4DB7DA11.8040503@redhat.com> <871v0njhab.fsf@devron.myhome.or.jp> <4DB93A6D.3010703@redhat.com> Mime-Version: 1.0 Content-Type: text/plain Cc: Jan Kiszka , kvm@vger.kernel.org To: Avi Kivity Return-path: Received: from mail.parknet.co.jp ([210.171.160.6]:54725 "EHLO mail.parknet.co.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756402Ab1D1NoJ (ORCPT ); Thu, 28 Apr 2011 09:44:09 -0400 In-Reply-To: <4DB93A6D.3010703@redhat.com> (Avi Kivity's message of "Thu, 28 Apr 2011 12:59:09 +0300") Sender: kvm-owner@vger.kernel.org List-ID: Avi Kivity writes: >> This seems to be complex stuff depending on hardware configurations. I'm >> not fully understanding though, current state of it is, >> >> Yes, PIC is in AEOI mode if linux is using IO-APIC. Um.., kvm says >> irq == 0 is mp_INT mode in MADT, not mp_ExtINT. > > That is correct, kvm doesn't connect the master 8259 output to the > IOAPIC. Instead the 8259 is connected to LINT0 (which is configured for > ExtInt when the IOAPIC is disabled, or for NMI which the NMI watchdog is > enabled). > > However, now I can't see how it would work. auto EOI works on the INTA > cycle, which would only occur if LINT0 is configured for ExtInt. If it > is configured for NMI, I don't think it would issue the INTA cycle. So > the NMI watchdog not working is actually correct for our hardware > configuration! > > But I may be misunderstanding something here. I see. If the physical machine was configured as above, I guess (not pretty sure, I don't have this configuration machine), IOAPIC test (check_timer() in io_apic.c) should fail, and IOAPIC wouldn't have any effect. And I think MADT should tell mp_ExtINT. Yes, I also guess the above configuration wouldn't work NMI watchdog of IOAPIC mode, and linux will report as NMI watchdog can't work in check_timer(). >> So I guess system does >> automatically INTA cycle (and AEOI because of PIC config), or not >> connected via 8259A? (like in mpspec figure 5-2.) >> >> To checking it, I've tested in check_timer() of linux on the physical >> machine (irq==0 and mp_INT). The test is something like, >> >> if (pin1 != -1) { >> /* >> * Ok, does IRQ0 through the IOAPIC work? >> */ >> unmask_IO_APIC_irq(0); >> disable_8259_irq(0); >> if (timer_irq_works()) { >> >> even if I called disable_8259_irq(0), timer was still working via >> IO-APIC. >> >> Would this explain why? > > Sorry, I got lost - what does this explain? I think this explains irq == 0 and mp_INT configuration tell PIT is connected to both of IOAPIC pin2 and PIC pin0, and it is why timer interrupt is working even when PIC pin0 was disabled. Thanks. -- OGAWA Hirofumi