From: Kevin Hilman <khilman@deeprootsystems.com>
To: Roger Quadros <ext-roger.quadros@nokia.com>
Cc: paul@pwsan.com, linux-omap@vger.kernel.org
Subject: Re: [PATCH] OMAP3: PM: Fix SDRC register addresses
Date: Wed, 05 Aug 2009 08:10:11 -0700 [thread overview]
Message-ID: <87skg68ffw.fsf@deeprootsystems.com> (raw)
In-Reply-To: <1249477918-7200-1-git-send-email-ext-roger.quadros@nokia.com> (Roger Quadros's message of "Wed\, 5 Aug 2009 16\:11\:58 +0300")
Roger Quadros <ext-roger.quadros@nokia.com> writes:
> SDRC addresses are offset from OMAP3430_SDRC_RT_BASE and not
> OMAP3430_SMS_RT_BASE.
> This fixes OFF mode on EMU/HS devices.
>
> Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Indeed, this was a merge goof on my part. Will fold into
earlier patch to undo.
Thanks,
Kevin
> ---
> arch/arm/mach-omap2/sleep34xx.S | 14 +++++++-------
> 1 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
> index 807b23e..53b6da9 100644
> --- a/arch/arm/mach-omap2/sleep34xx.S
> +++ b/arch/arm/mach-omap2/sleep34xx.S
> @@ -49,13 +49,13 @@
> #define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
> + SCRATCHPAD_MEM_OFFS)
> #define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
> -#define SDRC_SYSCONFIG_P (OMAP3430_SMS_RT_BASE + SDRC_SYSCONFIG)
> -#define SDRC_MR_0_P (OMAP3430_SMS_RT_BASE + SDRC_MR_0)
> -#define SDRC_EMR2_0_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_0)
> -#define SDRC_MANUAL_0_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_0)
> -#define SDRC_MR_1_P (OMAP3430_SMS_RT_BASE + SDRC_MR_1)
> -#define SDRC_EMR2_1_P (OMAP3430_SMS_RT_BASE + SDRC_EMR2_1)
> -#define SDRC_MANUAL_1_P (OMAP3430_SMS_RT_BASE + SDRC_MANUAL_1)
> +#define SDRC_SYSCONFIG_P (OMAP3430_SDRC_RT_BASE + SDRC_SYSCONFIG)
> +#define SDRC_MR_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_0)
> +#define SDRC_EMR2_0_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_0)
> +#define SDRC_MANUAL_0_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_0)
> +#define SDRC_MR_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MR_1)
> +#define SDRC_EMR2_1_P (OMAP3430_SDRC_RT_BASE + SDRC_EMR2_1)
> +#define SDRC_MANUAL_1_P (OMAP3430_SDRC_RT_BASE + SDRC_MANUAL_1)
> #define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
> #define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
>
> --
> 1.6.0.4
next prev parent reply other threads:[~2009-08-05 15:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-05 13:11 [PATCH] OMAP3: PM: Fix SDRC register addresses Roger Quadros
2009-08-05 15:10 ` Kevin Hilman [this message]
2009-08-07 11:48 ` Paul Walmsley
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