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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com,
	chris.p.wilson@linux.intel.com, jonathan.cavitt@intel.com,
	umesh.nirlige.ramappa@intel.com, matthew.d.roper@intel.com,
	nirmoy.das@intel.com
Subject: Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: add one header file for GT
Date: Mon, 02 Oct 2023 10:55:40 +0300	[thread overview]
Message-ID: <87ttr9h30j.fsf@intel.com> (raw)
In-Reply-To: <20230929201837.849299-3-jonathan.cavitt@intel.com>

On Fri, 29 Sep 2023, Jonathan Cavitt <jonathan.cavitt@intel.com> wrote:
> From: Fei Yang <fei.yang@intel.com>
>
> Add a new header file for GT related Macros.
> Move I915_MAX_GT to this new header file because it doesn't
> belong to the i915 level.
>
> Suggested-by: Andi Shyti <andi.shyti@linux.intel.com>
> Signed-off-by: Fei Yang <fei.yang@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> CC: Andi Shyti <andi.shyti@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_types.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index def7dd0eb6f19..d697fcd7bad77 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -23,6 +23,7 @@
>  #include "i915_perf_types.h"
>  #include "intel_engine_types.h"
>  #include "intel_gt_buffer_pool_types.h"
> +#include "intel_gt_defines.h"

Absolutely not.

Include it where needed.

We don't want catch-all headers.

BR,
Jani.

>  #include "intel_hwconfig.h"
>  #include "intel_llc_types.h"
>  #include "intel_reset_types.h"

-- 
Jani Nikula, Intel

  reply	other threads:[~2023-10-02  7:55 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-29 20:18 [Intel-gfx] [PATCH v2 1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-09-29 20:18 ` [Intel-gfx] [PATCH v2 2/4] drm/i915: No TLB invalidation on wedged or suspended GT Jonathan Cavitt
2023-10-02  7:53   ` Jani Nikula
2023-10-02  8:19     ` Tvrtko Ursulin
2023-10-02  8:42   ` Tvrtko Ursulin
2023-09-29 20:18 ` [Intel-gfx] [PATCH v2 3/4] drm/i915: add one header file for GT Jonathan Cavitt
2023-10-02  7:55   ` Jani Nikula [this message]
2023-09-29 20:18 ` [Intel-gfx] [PATCH v2 4/4] drm/i915: Invalidate the TLBs on each GT Jonathan Cavitt
2023-10-02 14:06   ` Andi Shyti
2023-09-29 21:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/4] drm/i915: Define and use GuC and CTB TLB invalidation routines Patchwork
2023-09-29 21:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-29 21:51 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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