Re: [Intel-gfx] [topic/core-for-ci v2] iommu/vt-d: Check domain flags before setting snp bit in page-control

[Jani Nikula <jani.nikula@linux.intel.com>]

On Thu, 24 Aug 2023, Radhakrishna Sripada <radhakrishna.sripada@intel.com> wrote:
> From: Ashok Raj <ashok.raj@intel.com>
>

The *why* goes here, along with a link to a gitlab issue.

Please don't expect topic/core-for-ci to have lower standards than any
other branches. That's not the case. On the contrary, you'll need the
*additional* justification for the commit being in topic/core-for-ci,
and the gitlab issue.


BR,
Jani.


> Signed-off-by: Ashok Raj <ashok.raj@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> ---
>  drivers/iommu/intel/iommu.c | 2 +-
>  drivers/iommu/intel/pasid.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 5c8c5cdc36cf..71da6f818e96 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -2150,7 +2150,7 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
>  	if ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) == 0)
>  		return -EINVAL;
>  
> -	attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP);
> +	attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE);
>  	attr |= DMA_FL_PTE_PRESENT;
>  	if (domain->use_first_level) {
>  		attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US | DMA_FL_PTE_ACCESS;
> diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
> index c5d479770e12..a057ecf84d82 100644
> --- a/drivers/iommu/intel/pasid.c
> +++ b/drivers/iommu/intel/pasid.c
> @@ -538,7 +538,7 @@ int intel_pasid_setup_first_level(struct intel_iommu *iommu,
>  	if (flags & PASID_FLAG_FL5LP)
>  		pasid_set_flpm(pte, 1);
>  
> -	if (flags & PASID_FLAG_PAGE_SNOOP)
> +	if ((flags & PASID_FLAG_PAGE_SNOOP) && ecap_sc_support(iommu->ecap))
>  		pasid_set_pgsnp(pte);
>  
>  	pasid_set_domain_id(pte, did);

-- 
Jani Nikula, Intel Open Source Graphics Center