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From: Marc Zyngier <maz@kernel.org>
To: Jianmin Lv <lvjianmin@loongson.cn>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	linux-kernel@vger.kernel.org, Hanjun Guo <guohanjun@huawei.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH V13 09/13] irqchip/loongson-liointc: Add ACPI init support
Date: Wed, 29 Jun 2022 14:13:53 +0100	[thread overview]
Message-ID: <87tu831ujy.wl-maz@kernel.org> (raw)
In-Reply-To: <1656329997-20524-10-git-send-email-lvjianmin@loongson.cn>

On Mon, 27 Jun 2022 12:39:53 +0100,
Jianmin Lv <lvjianmin@loongson.cn> wrote:
> 
> From: Huacai Chen <chenhuacai@loongson.cn>
> 
> We are preparing to add new Loongson (based on LoongArch, not compatible
> with old MIPS-based Loongson) support. LoongArch use ACPI other than DT
> as its boot protocol, so add ACPI init support.
> 
> LIOINTC stands for "Legacy I/O Interrupts" that described in Section
> 11.1 of "Loongson 3A5000 Processor Reference Manual". For more
> information please refer Documentation/loongarch/irq-chip-model.rst.

This is what happens with this series while compiling for MIPS:

drivers/irqchip/irq-loongson-liointc.c: In function ‘liointc_domain_xlate’:
drivers/irqchip/irq-loongson-liointc.c:170:28: error: ‘GSI_MIN_CPU_IRQ’ undeclared (first use in this function)
  170 |  *out_hwirq = intspec[0] - GSI_MIN_CPU_IRQ;
      |                            ^~~~~~~~~~~~~~~

I haven't bothered reviewing more patches, as this is a waste of my
time.

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2022-06-29 13:14 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-27 11:39 [PATCH V13 00/13] irqchip: Add LoongArch-related irqchip drivers Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 01/13] APCI: irq: Add support for multiple GSI domains Jianmin Lv
2022-06-28 12:50   ` Hanjun Guo
2022-06-27 11:39 ` [PATCH V13 02/13] ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback Jianmin Lv
2022-06-28 13:26   ` Hanjun Guo
2022-06-27 11:39 ` [PATCH V13 03/13] genirq/generic_chip: export irq_unmap_generic_chip Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 04/13] LoongArch: Use ACPI_GENERIC_GSI for gsi handling Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 05/13] irqchip: Add Loongson PCH LPC controller support Jianmin Lv
2022-06-29 10:58   ` Marc Zyngier
2022-06-30  4:40     ` Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 06/13] irqchip/loongson-pch-pic: Add ACPI init support Jianmin Lv
2022-06-29 11:20   ` Marc Zyngier
2022-06-30  4:36     ` Jianmin Lv
2022-06-30  7:22       ` Marc Zyngier
2022-06-30  8:37         ` Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 07/13] irqchip/loongson-pch-msi: " Jianmin Lv
2022-06-29 13:15   ` Marc Zyngier
2022-06-30  2:51     ` Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 08/13] irqchip/loongson-htvec: " Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 09/13] irqchip/loongson-liointc: " Jianmin Lv
2022-06-29 13:13   ` Marc Zyngier [this message]
2022-06-30  2:52     ` Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 10/13] irqchip: Add Loongson Extended I/O interrupt controller support Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 11/13] irqchip: Add LoongArch CPU " Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 12/13] irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch Jianmin Lv
2022-06-27 11:39 ` [PATCH V13 13/13] LoongArch: Fix irq number for timer and ipi Jianmin Lv

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