From: Marc Zyngier <maz@kernel.org>
To: Jianmin Lv <lvjianmin@loongson.cn>
Cc: Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, Xuefeng Li <lixuefeng@loongson.cn>,
Huacai Chen <chenhuacai@gmail.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>,
Hanjun Guo <guohanjun@huawei.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Subject: Re: [PATCH RFC V2 02/10] irqchip: Add LoongArch CPU interrupt controller support
Date: Tue, 07 Jun 2022 07:56:52 +0100 [thread overview]
Message-ID: <87tu8xyn9n.wl-maz@kernel.org> (raw)
In-Reply-To: <0c6b88f8-c100-4068-5370-c30e95365b3c@loongson.cn>
On Tue, 07 Jun 2022 04:41:22 +0100,
Jianmin Lv <lvjianmin@loongson.cn> wrote:
>
>
> On 2022/6/6 下午6:02, Marc Zyngier wrote:
> > + Lorenzo and Hanjun who maintain the ACPI irq code
> >
> > On Thu, 02 Jun 2022 04:16:30 +0100,
> > Jianmin Lv <lvjianmin@loongson.cn> wrote:
[...]
> >> I'm so sorry, I really don't find a way to reuse driver/acpi/irq.c
> >> after my humble work.
> > I don't think reimplementing ACPI is the solution. What could be a
> > reasonable approach is a way to overload the retrieval of the
> > acpi_gsi_domain_id fwnode with a GSI parameter.
> >
> > I hacked the following patch, which will give you an idea of what I
> > have in mind (only compile-tested).
>
>
> Hi, Marc, thanks so much for your patch. I have verified it on my
> LoongArch machine and it works well.
>
>
> BTW, in acpi_get_irq_source_fwhandle(), maybe
> acpi_get_gsi_domain_id(ctx->index) is needed to changed to
> acpi_get_gsi_domain_id(irq->interrupts[ctx->index])?
Yes, absolutely. Thanks for spotting it.
> I have another question, for LoongArch, acpi_isa_irq_to_gsi is
> required to implemente, but no common version, do we need to
> implemente an weak version in driver/acpi/irq.c as following?
>
>
> int __weak acpi_isa_irq_to_gsi(unsigned int isa_irq, u32 *gsi)
> {
> if (gsi)
> *gsi = isa_irq;
> return 0;
> }
Do you actually have CONFIG_ISA? In 2022? For a brand new architecture?
If you really have to, then this needs to be a bit more involved:
#ifdef CONFIG_ISA
int __weak acpi_isa_irq_to_gsi(unsigned int isa_irq, u32 *gsi)
{
if (irq < nr_legacy_irqs()) {
*gsi = isa_irq;
return 0;
}
return -1;
}
#endif
But I'd rather you get rid of any such legacy if this can be avoided.
> I'll use the way you provided here to reuse driver/acpi/irq.c in next
> version. How should I do next? Should I integrate your patch into my
> next version or wait for you to merge it first?
Please pick up the patch (with the above fix), and use it as a prefix
to your series. It needs to be reviewed by the relevant maintainers
anyway.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2022-06-07 6:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-27 11:02 [PATCH RFC V2 00/10] irqchip: Add LoongArch-related irqchip drivers Jianmin Lv
2022-05-27 11:02 ` [PATCH RFC V2 01/10] irqchip: Adjust Kconfig for Loongson Jianmin Lv
2022-05-27 11:02 ` [PATCH RFC V2 02/10] irqchip: Add LoongArch CPU interrupt controller support Jianmin Lv
2022-05-30 16:20 ` Marc Zyngier
2022-05-31 11:01 ` 吕建民
2022-05-31 13:56 ` Marc Zyngier
2022-06-01 3:35 ` Jianmin Lv
2022-06-02 3:16 ` Jianmin Lv
2022-06-06 10:02 ` Marc Zyngier
2022-06-07 3:41 ` Jianmin Lv
2022-06-07 6:56 ` Marc Zyngier [this message]
2022-06-08 8:55 ` Jianmin Lv
2022-05-27 11:02 ` [PATCH RFC V2 03/10] irqchip/loongson-pch-pic: Add ACPI init support Jianmin Lv
2022-05-27 11:02 ` [PATCH RFC V2 04/10] irqchip/loongson-pch-pic: Add suspend/resume support Jianmin Lv
2022-05-27 11:02 ` [PATCH RFC V2 05/10] irqchip/loongson-pch-msi: Add ACPI init support Jianmin Lv
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