All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Jouni Högander" <jouni.hogander@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: jose.souza@intel.com, mika.kahola@intel.com, wan-gyeong.mun@intel.com
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: Add initial selective fetch support for biplanar formats
Date: Thu, 21 Oct 2021 13:21:42 +0300	[thread overview]
Message-ID: <87tuhan0eh.fsf@intel.com> (raw)
In-Reply-To: <20211021101024.13112-2-jouni.hogander@intel.com>

On Thu, 21 Oct 2021, Jouni Högander <jouni.hogander@intel.com> wrote:
> Biplanar formats are using two planes (Y and UV). This patch adds handling
> of Y selective fetch area by utilizing existing linked plane mechanism.
> Also UV plane Y offset configuration is modified according to Bspec.

FYI, it's fine to add the bspec reference as a tag in the commit
message, e.g.

Bspec: 12345

See git log --grep="^Bspec:" for examples.

No need to resend for this.

BR,
Jani.

>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 30 +++++++++++++++++++++---
>  1 file changed, 27 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 49c2dfbd4055..469bf95178f3 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1467,10 +1467,19 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
>  	val |= plane_state->uapi.dst.x1;
>  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_POS(pipe, plane->id), val);
>  
> -	/* TODO: consider auxiliary surfaces */
> -	x = plane_state->uapi.src.x1 >> 16;
> -	y = (plane_state->uapi.src.y1 >> 16) + clip->y1;
> +	x = plane_state->view.color_plane[color_plane].x;
> +
> +	/*
> +	 * From Bspec: UV surface Start Y Position = half of Y plane Y
> +	 * start position.
> +	 */
> +	if (!color_plane)
> +		y = plane_state->view.color_plane[color_plane].y + clip->y1;
> +	else
> +		y = plane_state->view.color_plane[color_plane].y + clip->y1 / 2;
> +
>  	val = y << 16 | x;
> +
>  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane->id),
>  			  val);
>  
> @@ -1700,6 +1709,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>  	for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
>  					     new_plane_state, i) {
>  		struct drm_rect *sel_fetch_area, inter;
> +		struct intel_plane *linked = new_plane_state->planar_linked_plane;
>  
>  		if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc ||
>  		    !new_plane_state->uapi.visible)
> @@ -1718,6 +1728,20 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>  		sel_fetch_area->y1 = inter.y1 - new_plane_state->uapi.dst.y1;
>  		sel_fetch_area->y2 = inter.y2 - new_plane_state->uapi.dst.y1;
>  		crtc_state->update_planes |= BIT(plane->id);
> +
> +		/*
> +		 * Sel_fetch_area is calculated for UV plane. Use
> +		 * same area for Y plane as well.
> +		 */
> +		if (linked) {
> +			struct intel_plane_state *linked_new_plane_state =
> +			  intel_atomic_get_new_plane_state(state, linked);
> +			struct drm_rect *linked_sel_fetch_area =
> +			  &linked_new_plane_state->psr2_sel_fetch_area;
> +
> +			linked_sel_fetch_area->y1 = sel_fetch_area->y1;
> +			linked_sel_fetch_area->y2 = sel_fetch_area->y2;
> +		}
>  	}
>  
>  skip_sel_fetch_set_loop:

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2021-10-21 10:21 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-21 10:10 [Intel-gfx] [PATCH 0/2] Selective fetch support for biplanar formats Jouni Högander
2021-10-21 10:10 ` [Intel-gfx] [PATCH 1/2] drm/i915/display: Add initial selective " Jouni Högander
2021-10-21 10:21   ` Jani Nikula [this message]
2021-10-29 19:25   ` Souza, Jose
2021-10-21 10:10 ` [Intel-gfx] [PATCH 2/2] Revert "drm/i915/display/psr: Do full fetch when handling multi-planar formats" Jouni Högander
2021-10-29 19:26   ` Souza, Jose
2021-10-21 10:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Selective fetch support for biplanar formats Patchwork
2021-10-21 10:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-21 12:09 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-22 15:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2021-10-29 19:44   ` Souza, Jose

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87tuhan0eh.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jose.souza@intel.com \
    --cc=jouni.hogander@intel.com \
    --cc=mika.kahola@intel.com \
    --cc=wan-gyeong.mun@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.