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From: Thomas Gleixner <tglx@linutronix.de>
To: "Saripalli\, RK" <rsaripal@amd.com>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org, mingo@redhat.com,
	bp@alien8.de, hpa@zytor.com, Jonathan Corbet <corbet@lwn.net>,
	bsd@redhat.com, Josh Poimboeuf <jpoimboe@redhat.com>
Subject: Re: [PATCH v5 1/1] x86/cpufeatures: Implement Predictive Store Forwarding control.
Date: Fri, 07 May 2021 17:33:41 +0200	[thread overview]
Message-ID: <87tunemucq.ffs@nanos.tec.linutronix.de> (raw)
In-Reply-To: <661f2603-1db3-9601-617a-6cc44b6e94ab@amd.com>

On Fri, May 07 2021 at 10:23, RK Saripalli wrote:
> On 5/7/2021 10:13 AM, Thomas Gleixner wrote:
>> Something like the below. You get the idea.
>
> I agree and the first patchset did indeed treat this vulnerability just
> like others. It was converted to this patchset based on reviews from the upstream
> community.

Yes, I saw that and said so.

But I fundamentaly disagree with that for the reasons I mentioned. Sorry
for not paying attention early on.

Thanks,

        tglx


  reply	other threads:[~2021-05-07 15:33 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-05 19:09 [PATCH v5 0/1] Introduce support for PSF control Ramakrishna Saripalli
2021-05-05 19:09 ` [PATCH v5 1/1] x86/cpufeatures: Implement Predictive Store Forwarding control Ramakrishna Saripalli
2021-05-07 15:13   ` Thomas Gleixner
2021-05-07 15:23     ` Saripalli, RK
2021-05-07 15:33       ` Thomas Gleixner [this message]
2021-05-10 11:10     ` Saripalli, RK
2021-05-10 21:44       ` Thomas Gleixner
2021-05-10 22:01         ` Saripalli, RK
2021-05-10 22:09         ` Kees Cook
2021-05-10 22:15           ` Thomas Gleixner
2021-05-10 22:24             ` Kees Cook
2021-05-10 22:34             ` Kees Cook

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