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Location : parse_addr6(), p0f-client.c:67 X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > These are now completely covered by mov from a > TYPE_CONST temporary. > > Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e > --- > include/tcg/tcg-opc.h | 3 --- > tcg/aarch64/tcg-target.inc.c | 3 --- > tcg/arm/tcg-target.inc.c | 1 - > tcg/i386/tcg-target.inc.c | 3 --- > tcg/mips/tcg-target.inc.c | 2 -- > tcg/optimize.c | 4 ---- > tcg/ppc/tcg-target.inc.c | 3 --- > tcg/riscv/tcg-target.inc.c | 2 -- > tcg/s390/tcg-target.inc.c | 2 -- > tcg/sparc/tcg-target.inc.c | 2 -- > tcg/tcg-op-vec.c | 1 - > tcg/tcg.c | 18 +----------------- > tcg/tci/tcg-target.inc.c | 2 -- > 13 files changed, 1 insertion(+), 45 deletions(-) > > diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h > index 7dee9b38f7..4a9cbf5426 100644 > --- a/include/tcg/tcg-opc.h > +++ b/include/tcg/tcg-opc.h > @@ -45,7 +45,6 @@ DEF(br, 0, 0, 1, TCG_OPF_BB_END) > DEF(mb, 0, 0, 1, 0) >=20=20 > DEF(mov_i32, 1, 1, 0, TCG_OPF_NOT_PRESENT) > -DEF(movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT) > DEF(setcond_i32, 1, 2, 1, 0) > DEF(movcond_i32, 1, 4, 1, IMPL(TCG_TARGET_HAS_movcond_i32)) > /* load/store */ > @@ -110,7 +109,6 @@ DEF(ctz_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_ctz_i32)) > DEF(ctpop_i32, 1, 1, 0, IMPL(TCG_TARGET_HAS_ctpop_i32)) >=20=20 > DEF(mov_i64, 1, 1, 0, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT) > -DEF(movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT) > DEF(setcond_i64, 1, 2, 1, IMPL64) > DEF(movcond_i64, 1, 4, 1, IMPL64 | IMPL(TCG_TARGET_HAS_movcond_i64)) > /* load/store */ > @@ -215,7 +213,6 @@ DEF(qemu_st_i64, 0, TLADDR_ARGS + DATA64_ARGS, 1, > #define IMPLVEC TCG_OPF_VECTOR | IMPL(TCG_TARGET_MAYBE_vec) >=20=20 > DEF(mov_vec, 1, 1, 0, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT) > -DEF(dupi_vec, 1, 0, 1, TCG_OPF_VECTOR | TCG_OPF_NOT_PRESENT) >=20=20 > DEF(dup_vec, 1, 1, 0, IMPLVEC) > DEF(dup2_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_REG_BITS =3D=3D 32)) > diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c > index 843fd0ca69..7918aeb9d5 100644 > --- a/tcg/aarch64/tcg-target.inc.c > +++ b/tcg/aarch64/tcg-target.inc.c > @@ -2261,8 +2261,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, >=20=20 > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > g_assert_not_reached(); > @@ -2467,7 +2465,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, > break; >=20=20 > case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */ > - case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */ > case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */ > default: > g_assert_not_reached(); > diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c > index 6aa7757aac..b967499fa4 100644 > --- a/tcg/arm/tcg-target.inc.c > +++ b/tcg/arm/tcg-target.inc.c > @@ -2068,7 +2068,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, > break; >=20=20 > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > tcg_abort(); > diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c > index ec083bddcf..320a4bddd1 100644 > --- a/tcg/i386/tcg-target.inc.c > +++ b/tcg/i386/tcg-target.inc.c > @@ -2678,8 +2678,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, > break; > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > tcg_abort(); > @@ -2965,7 +2963,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, > break; >=20=20 > case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */ > - case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */ > case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */ > default: > g_assert_not_reached(); > diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c > index 4d32ebc1df..09dc5a94fa 100644 > --- a/tcg/mips/tcg-target.inc.c > +++ b/tcg/mips/tcg-target.inc.c > @@ -2155,8 +2155,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, > break; > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > tcg_abort(); > diff --git a/tcg/optimize.c b/tcg/optimize.c > index dd5187be31..9a2c945dbe 100644 > --- a/tcg/optimize.c > +++ b/tcg/optimize.c > @@ -1099,10 +1099,6 @@ void tcg_optimize(TCGContext *s) > CASE_OP_32_64_VEC(mov): > tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); > break; > - CASE_OP_32_64(movi): > - case INDEX_op_dupi_vec: > - tcg_opt_gen_movi(s, &temps_used, op, op->args[0], op->args[1= ]); > - break; >=20=20 > case INDEX_op_dup_vec: > if (arg_is_const(op->args[1])) { > diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c > index ee1f9227c1..fb390ad978 100644 > --- a/tcg/ppc/tcg-target.inc.c > +++ b/tcg/ppc/tcg-target.inc.c > @@ -2967,8 +2967,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc= , const TCGArg *args, >=20=20 > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > tcg_abort(); > @@ -3310,7 +3308,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, > return; >=20=20 > case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */ > - case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */ > case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */ > default: > g_assert_not_reached(); > diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c > index 2bc0ba71f2..ec609272ad 100644 > --- a/tcg/riscv/tcg-target.inc.c > +++ b/tcg/riscv/tcg-target.inc.c > @@ -1606,8 +1606,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, >=20=20 > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > g_assert_not_reached(); > diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c > index b07e9ff7d6..f6b003a700 100644 > --- a/tcg/s390/tcg-target.inc.c > +++ b/tcg/s390/tcg-target.inc.c > @@ -2310,8 +2310,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpc= ode opc, >=20=20 > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > tcg_abort(); > diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c > index 65fddb310d..0808b79eee 100644 > --- a/tcg/sparc/tcg-target.inc.c > +++ b/tcg/sparc/tcg-target.inc.c > @@ -1591,8 +1591,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, >=20=20 > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > tcg_abort(); > diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c > index 655b3ae32d..6343046e18 100644 > --- a/tcg/tcg-op-vec.c > +++ b/tcg/tcg-op-vec.c > @@ -83,7 +83,6 @@ bool tcg_can_emit_vecop_list(const TCGOpcode *list, > case INDEX_op_xor_vec: > case INDEX_op_mov_vec: > case INDEX_op_dup_vec: > - case INDEX_op_dupi_vec: > case INDEX_op_dup2_vec: > case INDEX_op_ld_vec: > case INDEX_op_st_vec: > diff --git a/tcg/tcg.c b/tcg/tcg.c > index 59beb2bf29..adb71f16ae 100644 > --- a/tcg/tcg.c > +++ b/tcg/tcg.c > @@ -1463,7 +1463,6 @@ bool tcg_op_supported(TCGOpcode op) > return TCG_TARGET_HAS_goto_ptr; >=20=20 > case INDEX_op_mov_i32: > - case INDEX_op_movi_i32: > case INDEX_op_setcond_i32: > case INDEX_op_brcond_i32: > case INDEX_op_ld8u_i32: > @@ -1557,7 +1556,6 @@ bool tcg_op_supported(TCGOpcode op) > return TCG_TARGET_REG_BITS =3D=3D 32; >=20=20 > case INDEX_op_mov_i64: > - case INDEX_op_movi_i64: > case INDEX_op_setcond_i64: > case INDEX_op_brcond_i64: > case INDEX_op_ld8u_i64: > @@ -1663,7 +1661,6 @@ bool tcg_op_supported(TCGOpcode op) >=20=20 > case INDEX_op_mov_vec: > case INDEX_op_dup_vec: > - case INDEX_op_dupi_vec: > case INDEX_op_dupm_vec: > case INDEX_op_ld_vec: > case INDEX_op_st_vec: > @@ -3447,7 +3444,7 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCG= RegSet allocated_regs) > } >=20=20 > /* > - * Specialized code generation for INDEX_op_movi_*. > + * Specialized code generation for INDEX_op_mov_* with a constant. > */ > static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots, > tcg_target_ulong val, TCGLifeData arg_= life, > @@ -3470,14 +3467,6 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, T= CGTemp *ots, > } > } >=20=20 > -static void tcg_reg_alloc_movi(TCGContext *s, const TCGOp *op) > -{ > - TCGTemp *ots =3D arg_temp(op->args[0]); > - tcg_target_ulong val =3D op->args[1]; > - > - tcg_reg_alloc_do_movi(s, ots, val, op->life, op->output_pref[0]); > -} > - > /* > * Specialized code generation for INDEX_op_mov_*. > */ > @@ -4263,11 +4252,6 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *= tb) > case INDEX_op_mov_vec: > tcg_reg_alloc_mov(s, op); > break; > - case INDEX_op_movi_i32: > - case INDEX_op_movi_i64: > - case INDEX_op_dupi_vec: > - tcg_reg_alloc_movi(s, op); > - break; > case INDEX_op_dup_vec: > tcg_reg_alloc_dup(s, op); > break; > diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c > index 1f1639df0d..b796f4fc19 100644 > --- a/tcg/tci/tcg-target.inc.c > +++ b/tcg/tci/tcg-target.inc.c > @@ -815,8 +815,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, > break; > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > - case INDEX_op_movi_i64: > case INDEX_op_call: /* Always emitted via tcg_out_call. */ > default: > tcg_abort(); --=20 Alex Benn=C3=A9e