* [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences
@ 2018-03-29 10:26 Chris Wilson
2018-03-29 13:43 ` ✓ Fi.CI.BAT: success for " Patchwork
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Chris Wilson @ 2018-03-29 10:26 UTC (permalink / raw)
To: intel-gfx
We would like to start doing some bookkeeping at the beginning, between
contexts and at the end of execlists submission. We already mark the
beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
when the HW is idle. This give us a pair of sequence points we can then
expand on for further bookkeeping.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Francisco Jerez <currojerez@riseup.net>
---
drivers/gpu/drm/i915/intel_lrc.c | 42 ++++++++++++++++++++++++---------
drivers/gpu/drm/i915/intel_ringbuffer.h | 11 ++++++++-
2 files changed, 41 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 654634254b64..61fb1387feb3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -374,6 +374,19 @@ execlists_context_status_change(struct i915_request *rq, unsigned long status)
status, rq);
}
+static inline void
+execlists_user_begin(struct intel_engine_execlists *execlists,
+ const struct execlist_port *port)
+{
+ execlists_set_active_once(execlists, EXECLISTS_ACTIVE_USER);
+}
+
+static inline void
+execlists_user_end(struct intel_engine_execlists *execlists)
+{
+ execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
+}
+
static inline void
execlists_context_schedule_in(struct i915_request *rq)
{
@@ -710,7 +723,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
spin_unlock_irq(&engine->timeline->lock);
if (submit) {
- execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
+ execlists_user_begin(execlists, execlists->port);
execlists_submit_ports(engine);
}
@@ -741,7 +754,7 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
port++;
}
- execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
+ execlists_user_end(execlists);
}
static void clear_gtiir(struct intel_engine_cs *engine)
@@ -872,7 +885,7 @@ static void execlists_submission_tasklet(unsigned long data)
{
struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
struct intel_engine_execlists * const execlists = &engine->execlists;
- struct execlist_port * const port = execlists->port;
+ struct execlist_port *port = execlists->port;
struct drm_i915_private *dev_priv = engine->i915;
bool fw = false;
@@ -1010,9 +1023,19 @@ static void execlists_submission_tasklet(unsigned long data)
GEM_BUG_ON(count == 0);
if (--count == 0) {
+ /*
+ * On the final event corresponding to the
+ * submission of this context, we expect either
+ * an element-switch event or a completion
+ * event (and on completion, the active-idle
+ * marker). No more preemptions, lite-restore
+ * or otherwise
+ */
GEM_BUG_ON(status & GEN8_CTX_STATUS_PREEMPTED);
GEM_BUG_ON(port_isset(&port[1]) &&
!(status & GEN8_CTX_STATUS_ELEMENT_SWITCH));
+ GEM_BUG_ON(!port_isset(&port[1]) &&
+ !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
GEM_BUG_ON(!i915_request_completed(rq));
execlists_context_schedule_out(rq);
trace_i915_request_out(rq);
@@ -1021,17 +1044,14 @@ static void execlists_submission_tasklet(unsigned long data)
GEM_TRACE("%s completed ctx=%d\n",
engine->name, port->context_id);
- execlists_port_complete(execlists, port);
+ port = execlists_port_complete(execlists, port);
+ if (port_isset(port))
+ execlists_user_begin(execlists, port);
+ else
+ execlists_user_end(execlists);
} else {
port_set(port, port_pack(rq, count));
}
-
- /* After the final element, the hw should be idle */
- GEM_BUG_ON(port_count(port) == 0 &&
- !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
- if (port_count(port) == 0)
- execlists_clear_active(execlists,
- EXECLISTS_ACTIVE_USER);
}
if (head != execlists->csb_head) {
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a02c7b3b9d55..2e20627e254b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -638,6 +638,13 @@ execlists_set_active(struct intel_engine_execlists *execlists,
__set_bit(bit, (unsigned long *)&execlists->active);
}
+static inline bool
+execlists_set_active_once(struct intel_engine_execlists *execlists,
+ unsigned int bit)
+{
+ return !__test_and_set_bit(bit, (unsigned long *)&execlists->active);
+}
+
static inline void
execlists_clear_active(struct intel_engine_execlists *execlists,
unsigned int bit)
@@ -664,7 +671,7 @@ execlists_num_ports(const struct intel_engine_execlists * const execlists)
return execlists->port_mask + 1;
}
-static inline void
+static inline struct execlist_port *
execlists_port_complete(struct intel_engine_execlists * const execlists,
struct execlist_port * const port)
{
@@ -675,6 +682,8 @@ execlists_port_complete(struct intel_engine_execlists * const execlists,
memmove(port, port + 1, m * sizeof(struct execlist_port));
memset(port + m, 0, sizeof(struct execlist_port));
+
+ return port;
}
static inline unsigned int
--
2.16.3
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/execlists: Track begin/end of execlists submission sequences
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
@ 2018-03-29 13:43 ` Patchwork
2018-03-29 16:39 ` ✗ Fi.CI.IGT: failure " Patchwork
` (5 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-03-29 13:43 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Track begin/end of execlists submission sequences
URL : https://patchwork.freedesktop.org/series/40870/
State : success
== Summary ==
Series 40870v1 drm/i915/execlists: Track begin/end of execlists submission sequences
https://patchwork.freedesktop.org/api/1.0/series/40870/revisions/1/mbox/
---- Known issues:
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-b-frame-sequence:
fail -> PASS (fi-cfl-s3) fdo#103481
Subgroup suspend-read-crc-pipe-c:
pass -> INCOMPLETE (fi-bxt-dsi) fdo#103927
pass -> DMESG-WARN (fi-cnl-y3) fdo#104951
Test prime_vgem:
Subgroup basic-fence-flip:
pass -> FAIL (fi-ilk-650) fdo#104008
fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:429s
fi-bdw-gvtdvm total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:441s
fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:385s
fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:537s
fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:297s
fi-bxt-dsi total:243 pass:216 dwarn:0 dfail:0 fail:0 skip:26
fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:511s
fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:518s
fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:507s
fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:407s
fi-cfl-s3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:564s
fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:511s
fi-cnl-y3 total:285 pass:258 dwarn:1 dfail:0 fail:0 skip:26 time:587s
fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:422s
fi-gdg-551 total:285 pass:176 dwarn:0 dfail:0 fail:1 skip:108 time:319s
fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:536s
fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:402s
fi-ilk-650 total:285 pass:224 dwarn:0 dfail:0 fail:1 skip:60 time:427s
fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:464s
fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:431s
fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:469s
fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:462s
fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:510s
fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:656s
fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:442s
fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:540s
fi-skl-6700k2 total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:501s
fi-skl-6770hq total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:497s
fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:427s
fi-skl-gvtdvm total:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:448s
fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:406s
Blacklisted hosts:
fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:515s
fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:484s
d6e43ca115e525e6d53539be28100d2ee0958655 drm-tip: 2018y-03m-29d-12h-46m-03s UTC integration manifest
08b56dea65d9 drm/i915/execlists: Track begin/end of execlists submission sequences
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8532/issues.html
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
2018-03-29 13:43 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-03-29 16:39 ` Patchwork
2018-03-29 17:20 ` [PATCH] " Francisco Jerez
` (4 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-03-29 16:39 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Track begin/end of execlists submission sequences
URL : https://patchwork.freedesktop.org/series/40870/
State : failure
== Summary ==
---- Possible new issues:
Test kms_chv_cursor_fail:
Subgroup pipe-a-64x64-left-edge:
pass -> FAIL (shard-snb)
Test kms_frontbuffer_tracking:
Subgroup fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-wc:
skip -> FAIL (shard-snb)
Subgroup psr-1p-rte:
skip -> FAIL (shard-snb)
Subgroup psr-2p-primscrn-indfb-plflip-blt:
skip -> FAIL (shard-snb)
Subgroup psr-2p-scndscrn-indfb-plflip-blt:
skip -> FAIL (shard-snb)
Test kms_vblank:
Subgroup pipe-b-ts-continuation-modeset-hang:
pass -> FAIL (shard-snb)
---- Known issues:
Test drv_selftest:
Subgroup live_gtt:
pass -> INCOMPLETE (shard-apl) fdo#103927
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-a:
incomplete -> PASS (shard-hsw) fdo#103375
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
shard-apl total:3473 pass:1808 dwarn:1 dfail:0 fail:7 skip:1655 time:12434s
shard-hsw total:3495 pass:1783 dwarn:1 dfail:0 fail:1 skip:1709 time:11528s
shard-snb total:3495 pass:1372 dwarn:1 dfail:0 fail:14 skip:2108 time:7006s
Blacklisted hosts:
shard-kbl total:3495 pass:1958 dwarn:1 dfail:0 fail:8 skip:1528 time:9285s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8532/shards.html
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
2018-03-29 13:43 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-03-29 16:39 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2018-03-29 17:20 ` Francisco Jerez
2018-03-31 12:40 ` Chris Wilson
2018-03-31 13:06 ` [PATCH v2] " Chris Wilson
` (3 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Francisco Jerez @ 2018-03-29 17:20 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
[-- Attachment #1.1.1: Type: text/plain, Size: 5923 bytes --]
Chris Wilson <chris@chris-wilson.co.uk> writes:
> We would like to start doing some bookkeeping at the beginning, between
> contexts and at the end of execlists submission. We already mark the
> beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
> when the HW is idle. This give us a pair of sequence points we can then
> expand on for further bookkeeping.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Francisco Jerez <currojerez@riseup.net>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 42 ++++++++++++++++++++++++---------
> drivers/gpu/drm/i915/intel_ringbuffer.h | 11 ++++++++-
> 2 files changed, 41 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 654634254b64..61fb1387feb3 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -374,6 +374,19 @@ execlists_context_status_change(struct i915_request *rq, unsigned long status)
> status, rq);
> }
>
> +static inline void
> +execlists_user_begin(struct intel_engine_execlists *execlists,
> + const struct execlist_port *port)
> +{
> + execlists_set_active_once(execlists, EXECLISTS_ACTIVE_USER);
> +}
> +
> +static inline void
> +execlists_user_end(struct intel_engine_execlists *execlists)
> +{
> + execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
> +}
> +
> static inline void
> execlists_context_schedule_in(struct i915_request *rq)
> {
> @@ -710,7 +723,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> spin_unlock_irq(&engine->timeline->lock);
>
> if (submit) {
> - execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_begin(execlists, execlists->port);
> execlists_submit_ports(engine);
> }
>
> @@ -741,7 +754,7 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
> port++;
> }
>
> - execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_end(execlists);
> }
>
> static void clear_gtiir(struct intel_engine_cs *engine)
> @@ -872,7 +885,7 @@ static void execlists_submission_tasklet(unsigned long data)
> {
> struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
> struct intel_engine_execlists * const execlists = &engine->execlists;
> - struct execlist_port * const port = execlists->port;
> + struct execlist_port *port = execlists->port;
> struct drm_i915_private *dev_priv = engine->i915;
> bool fw = false;
>
> @@ -1010,9 +1023,19 @@ static void execlists_submission_tasklet(unsigned long data)
>
> GEM_BUG_ON(count == 0);
> if (--count == 0) {
> + /*
> + * On the final event corresponding to the
> + * submission of this context, we expect either
> + * an element-switch event or a completion
> + * event (and on completion, the active-idle
> + * marker). No more preemptions, lite-restore
> + * or otherwise
Missing punctuation in the last sentence.
> + */
> GEM_BUG_ON(status & GEN8_CTX_STATUS_PREEMPTED);
> GEM_BUG_ON(port_isset(&port[1]) &&
> !(status & GEN8_CTX_STATUS_ELEMENT_SWITCH));
> + GEM_BUG_ON(!port_isset(&port[1]) &&
> + !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
> GEM_BUG_ON(!i915_request_completed(rq));
> execlists_context_schedule_out(rq);
> trace_i915_request_out(rq);
> @@ -1021,17 +1044,14 @@ static void execlists_submission_tasklet(unsigned long data)
> GEM_TRACE("%s completed ctx=%d\n",
> engine->name, port->context_id);
>
> - execlists_port_complete(execlists, port);
> + port = execlists_port_complete(execlists, port);
> + if (port_isset(port))
> + execlists_user_begin(execlists, port);
> + else
> + execlists_user_end(execlists);
> } else {
> port_set(port, port_pack(rq, count));
> }
> -
> - /* After the final element, the hw should be idle */
> - GEM_BUG_ON(port_count(port) == 0 &&
> - !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
> - if (port_count(port) == 0)
> - execlists_clear_active(execlists,
> - EXECLISTS_ACTIVE_USER);
Do we want to update the EXECLISTS_ACTIVE_USER tracking done in
intel_guc_submission.c to use the same wrappers? Either way looks okay
to me:
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
> }
>
> if (head != execlists->csb_head) {
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index a02c7b3b9d55..2e20627e254b 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -638,6 +638,13 @@ execlists_set_active(struct intel_engine_execlists *execlists,
> __set_bit(bit, (unsigned long *)&execlists->active);
> }
>
> +static inline bool
> +execlists_set_active_once(struct intel_engine_execlists *execlists,
> + unsigned int bit)
> +{
> + return !__test_and_set_bit(bit, (unsigned long *)&execlists->active);
> +}
> +
> static inline void
> execlists_clear_active(struct intel_engine_execlists *execlists,
> unsigned int bit)
> @@ -664,7 +671,7 @@ execlists_num_ports(const struct intel_engine_execlists * const execlists)
> return execlists->port_mask + 1;
> }
>
> -static inline void
> +static inline struct execlist_port *
> execlists_port_complete(struct intel_engine_execlists * const execlists,
> struct execlist_port * const port)
> {
> @@ -675,6 +682,8 @@ execlists_port_complete(struct intel_engine_execlists * const execlists,
>
> memmove(port, port + 1, m * sizeof(struct execlist_port));
> memset(port + m, 0, sizeof(struct execlist_port));
> +
> + return port;
> }
>
> static inline unsigned int
> --
> 2.16.3
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences
2018-03-29 17:20 ` [PATCH] " Francisco Jerez
@ 2018-03-31 12:40 ` Chris Wilson
0 siblings, 0 replies; 12+ messages in thread
From: Chris Wilson @ 2018-03-31 12:40 UTC (permalink / raw)
To: Francisco Jerez, intel-gfx
Quoting Francisco Jerez (2018-03-29 18:20:23)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > We would like to start doing some bookkeeping at the beginning, between
> > contexts and at the end of execlists submission. We already mark the
> > beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
> > when the HW is idle. This give us a pair of sequence points we can then
> > expand on for further bookkeeping.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Cc: Francisco Jerez <currojerez@riseup.net>
>
> Do we want to update the EXECLISTS_ACTIVE_USER tracking done in
> intel_guc_submission.c to use the same wrappers? Either way looks okay
> to me:
Yeah, looking at what's in the pipeline, the hook from guc will be used
in the same way.
-Chris
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2] drm/i915/execlists: Track begin/end of execlists submission sequences
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
` (2 preceding siblings ...)
2018-03-29 17:20 ` [PATCH] " Francisco Jerez
@ 2018-03-31 13:06 ` Chris Wilson
2018-04-02 16:32 ` Francisco Jerez
2018-04-03 11:17 ` Mika Kuoppala
2018-03-31 13:34 ` ✗ Fi.CI.BAT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) Patchwork
` (2 subsequent siblings)
6 siblings, 2 replies; 12+ messages in thread
From: Chris Wilson @ 2018-03-31 13:06 UTC (permalink / raw)
To: intel-gfx
We would like to start doing some bookkeeping at the beginning, between
contexts and at the end of execlists submission. We already mark the
beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
when the HW is idle. This give us a pair of sequence points we can then
expand on for further bookkeeping.
v2: Refactor guc submission to share the same begin/end.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net> #v1
---
drivers/gpu/drm/i915/intel_guc_submission.c | 17 ++++++----
drivers/gpu/drm/i915/intel_lrc.c | 50 ++++++++++++++++++++++-------
drivers/gpu/drm/i915/intel_ringbuffer.h | 15 ++++++++-
3 files changed, 63 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index 207cda062626..749f27916a02 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -728,7 +728,7 @@ static void guc_dequeue(struct intel_engine_cs *engine)
execlists->first = rb;
if (submit) {
port_assign(port, last);
- execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
+ execlists_user_begin(execlists, execlists->port);
guc_submit(engine);
}
@@ -748,17 +748,20 @@ static void guc_submission_tasklet(unsigned long data)
struct execlist_port *port = execlists->port;
struct i915_request *rq;
- rq = port_request(&port[0]);
+ rq = port_request(port);
while (rq && i915_request_completed(rq)) {
trace_i915_request_out(rq);
i915_request_put(rq);
- execlists_port_complete(execlists, port);
-
- rq = port_request(&port[0]);
+ port = execlists_port_complete(execlists, port);
+ if (port_isset(port)) {
+ execlists_user_begin(execlists, port);
+ rq = port_request(port);
+ } else {
+ execlists_user_end(execlists);
+ rq = NULL;
+ }
}
- if (!rq)
- execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
if (execlists_is_active(execlists, EXECLISTS_ACTIVE_PREEMPT) &&
intel_read_status_page(engine, I915_GEM_HWS_PREEMPT_INDEX) ==
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f60b61bf8b3b..4d08875422b6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -374,6 +374,19 @@ execlists_context_status_change(struct i915_request *rq, unsigned long status)
status, rq);
}
+inline void
+execlists_user_begin(struct intel_engine_execlists *execlists,
+ const struct execlist_port *port)
+{
+ execlists_set_active_once(execlists, EXECLISTS_ACTIVE_USER);
+}
+
+inline void
+execlists_user_end(struct intel_engine_execlists *execlists)
+{
+ execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
+}
+
static inline void
execlists_context_schedule_in(struct i915_request *rq)
{
@@ -711,7 +724,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
spin_unlock_irq(&engine->timeline->lock);
if (submit) {
- execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
+ execlists_user_begin(execlists, execlists->port);
execlists_submit_ports(engine);
}
@@ -742,7 +755,7 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
port++;
}
- execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
+ execlists_user_end(execlists);
}
static void clear_gtiir(struct intel_engine_cs *engine)
@@ -873,7 +886,7 @@ static void execlists_submission_tasklet(unsigned long data)
{
struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
struct intel_engine_execlists * const execlists = &engine->execlists;
- struct execlist_port * const port = execlists->port;
+ struct execlist_port *port = execlists->port;
struct drm_i915_private *dev_priv = engine->i915;
bool fw = false;
@@ -1012,10 +1025,28 @@ static void execlists_submission_tasklet(unsigned long data)
GEM_BUG_ON(count == 0);
if (--count == 0) {
+ /*
+ * On the final event corresponding to the
+ * submission of this context, we expect either
+ * an element-switch event or a completion
+ * event (and on completion, the active-idle
+ * marker). No more preemptions, lite-restore
+ * or otherwise.
+ */
GEM_BUG_ON(status & GEN8_CTX_STATUS_PREEMPTED);
GEM_BUG_ON(port_isset(&port[1]) &&
!(status & GEN8_CTX_STATUS_ELEMENT_SWITCH));
+ GEM_BUG_ON(!port_isset(&port[1]) &&
+ !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
+
+ /*
+ * We rely on the hardware being strongly
+ * ordered, that the breadcrumb write is
+ * coherent (visible from the CPU) before the
+ * user interrupt and CSB is processed.
+ */
GEM_BUG_ON(!i915_request_completed(rq));
+
execlists_context_schedule_out(rq);
trace_i915_request_out(rq);
i915_request_put(rq);
@@ -1023,17 +1054,14 @@ static void execlists_submission_tasklet(unsigned long data)
GEM_TRACE("%s completed ctx=%d\n",
engine->name, port->context_id);
- execlists_port_complete(execlists, port);
+ port = execlists_port_complete(execlists, port);
+ if (port_isset(port))
+ execlists_user_begin(execlists, port);
+ else
+ execlists_user_end(execlists);
} else {
port_set(port, port_pack(rq, count));
}
-
- /* After the final element, the hw should be idle */
- GEM_BUG_ON(port_count(port) == 0 &&
- !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
- if (port_count(port) == 0)
- execlists_clear_active(execlists,
- EXECLISTS_ACTIVE_USER);
}
if (head != execlists->csb_head) {
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a02c7b3b9d55..40461e29cdab 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -638,6 +638,13 @@ execlists_set_active(struct intel_engine_execlists *execlists,
__set_bit(bit, (unsigned long *)&execlists->active);
}
+static inline bool
+execlists_set_active_once(struct intel_engine_execlists *execlists,
+ unsigned int bit)
+{
+ return !__test_and_set_bit(bit, (unsigned long *)&execlists->active);
+}
+
static inline void
execlists_clear_active(struct intel_engine_execlists *execlists,
unsigned int bit)
@@ -652,6 +659,10 @@ execlists_is_active(const struct intel_engine_execlists *execlists,
return test_bit(bit, (unsigned long *)&execlists->active);
}
+void execlists_user_begin(struct intel_engine_execlists *execlists,
+ const struct execlist_port *port);
+void execlists_user_end(struct intel_engine_execlists *execlists);
+
void
execlists_cancel_port_requests(struct intel_engine_execlists * const execlists);
@@ -664,7 +675,7 @@ execlists_num_ports(const struct intel_engine_execlists * const execlists)
return execlists->port_mask + 1;
}
-static inline void
+static inline struct execlist_port *
execlists_port_complete(struct intel_engine_execlists * const execlists,
struct execlist_port * const port)
{
@@ -675,6 +686,8 @@ execlists_port_complete(struct intel_engine_execlists * const execlists,
memmove(port, port + 1, m * sizeof(struct execlist_port));
memset(port + m, 0, sizeof(struct execlist_port));
+
+ return port;
}
static inline unsigned int
--
2.16.3
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
` (3 preceding siblings ...)
2018-03-31 13:06 ` [PATCH v2] " Chris Wilson
@ 2018-03-31 13:34 ` Patchwork
2018-03-31 14:03 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-31 14:47 ` ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-03-31 13:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
URL : https://patchwork.freedesktop.org/series/40870/
State : failure
== Summary ==
Series 40870v2 drm/i915/execlists: Track begin/end of execlists submission sequences
https://patchwork.freedesktop.org/api/1.0/series/40870/revisions/2/mbox/
---- Possible new issues:
Test kms_flip:
Subgroup basic-flip-vs-modeset:
pass -> INCOMPLETE (fi-cnl-y3)
---- Known issues:
Test debugfs_test:
Subgroup read_all_entries:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:431s
fi-bdw-gvtdvm total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:439s
fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:379s
fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:538s
fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:294s
fi-bxt-dsi total:285 pass:255 dwarn:0 dfail:0 fail:0 skip:30 time:512s
fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:512s
fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:519s
fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:506s
fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:413s
fi-cfl-s3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:556s
fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:515s
fi-cnl-y3 total:217 pass:196 dwarn:0 dfail:0 fail:0 skip:20
fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:426s
fi-gdg-551 total:285 pass:176 dwarn:0 dfail:0 fail:1 skip:108 time:317s
fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:538s
fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:403s
fi-ilk-650 total:285 pass:225 dwarn:0 dfail:0 fail:0 skip:60 time:421s
fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:470s
fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:436s
fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:470s
fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:464s
fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:509s
fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:665s
fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:448s
fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:533s
fi-skl-6700k2 total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:503s
fi-skl-6770hq total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:510s
fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:432s
fi-skl-gvtdvm total:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:442s
fi-snb-2520m total:3 pass:2 dwarn:0 dfail:0 fail:0 skip:0
fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:399s
Blacklisted hosts:
fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:523s
fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:486s
c46052cde6a50c5459e00791ffc4d5aa1ec58a9e drm-tip: 2018y-03m-30d-18h-56m-26s UTC integration manifest
cd193e310ed5 drm/i915/execlists: Track begin/end of execlists submission sequences
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8557/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
` (4 preceding siblings ...)
2018-03-31 13:34 ` ✗ Fi.CI.BAT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) Patchwork
@ 2018-03-31 14:03 ` Patchwork
2018-03-31 14:47 ` ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-03-31 14:03 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
URL : https://patchwork.freedesktop.org/series/40870/
State : success
== Summary ==
Series 40870v2 drm/i915/execlists: Track begin/end of execlists submission sequences
https://patchwork.freedesktop.org/api/1.0/series/40870/revisions/2/mbox/
---- Known issues:
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
fail -> PASS (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test prime_vgem:
Subgroup basic-fence-flip:
pass -> FAIL (fi-ilk-650) fdo#104008
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:431s
fi-bdw-gvtdvm total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:442s
fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:382s
fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:537s
fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:295s
fi-bxt-dsi total:285 pass:255 dwarn:0 dfail:0 fail:0 skip:30 time:512s
fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:516s
fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:521s
fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:509s
fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:411s
fi-cfl-s3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:559s
fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:511s
fi-cnl-y3 total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:589s
fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:418s
fi-gdg-551 total:285 pass:177 dwarn:0 dfail:0 fail:0 skip:108 time:319s
fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:535s
fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:403s
fi-ilk-650 total:285 pass:224 dwarn:0 dfail:0 fail:1 skip:60 time:421s
fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:480s
fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:430s
fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:471s
fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:460s
fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:509s
fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:664s
fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:440s
fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:539s
fi-skl-6700k2 total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:506s
fi-skl-6770hq total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:506s
fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:432s
fi-skl-gvtdvm total:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:443s
fi-snb-2520m total:242 pass:208 dwarn:0 dfail:0 fail:0 skip:33
fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:401s
Blacklisted hosts:
fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:516s
fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:483s
c46052cde6a50c5459e00791ffc4d5aa1ec58a9e drm-tip: 2018y-03m-30d-18h-56m-26s UTC integration manifest
9930dadfffba drm/i915/execlists: Track begin/end of execlists submission sequences
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8558/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
` (5 preceding siblings ...)
2018-03-31 14:03 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-03-31 14:47 ` Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2018-03-31 14:47 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
URL : https://patchwork.freedesktop.org/series/40870/
State : failure
== Summary ==
---- Possible new issues:
Test kms_cursor_crc:
Subgroup cursor-64x64-suspend:
dmesg-warn -> PASS (shard-snb)
Test kms_cursor_legacy:
Subgroup cursor-vs-flip-toggle:
pass -> FAIL (shard-hsw)
---- Known issues:
Test gem_softpin:
Subgroup noreloc-s3:
incomplete -> PASS (shard-hsw) fdo#103540 +1
Test kms_cursor_legacy:
Subgroup 2x-long-flip-vs-cursor-atomic:
pass -> FAIL (shard-hsw) fdo#104873
Test kms_flip:
Subgroup 2x-blocking-wf_vblank:
pass -> FAIL (shard-hsw) fdo#100368 +2
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-shrfb-msflip-blt:
dmesg-fail -> PASS (shard-apl) fdo#104727
Test kms_rotation_crc:
Subgroup sprite-rotation-180:
pass -> FAIL (shard-hsw) fdo#103925
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#104727 https://bugs.freedesktop.org/show_bug.cgi?id=104727
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
shard-apl total:3495 pass:1831 dwarn:1 dfail:0 fail:7 skip:1655 time:12840s
shard-hsw total:3449 pass:1759 dwarn:1 dfail:0 fail:7 skip:1680 time:10961s
shard-snb total:3495 pass:1374 dwarn:1 dfail:0 fail:3 skip:2117 time:7017s
Blacklisted hosts:
shard-kbl total:3495 pass:1959 dwarn:1 dfail:0 fail:7 skip:1528 time:9258s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8558/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915/execlists: Track begin/end of execlists submission sequences
2018-03-31 13:06 ` [PATCH v2] " Chris Wilson
@ 2018-04-02 16:32 ` Francisco Jerez
2018-04-03 11:33 ` Chris Wilson
2018-04-03 11:17 ` Mika Kuoppala
1 sibling, 1 reply; 12+ messages in thread
From: Francisco Jerez @ 2018-04-02 16:32 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
[-- Attachment #1.1.1: Type: text/plain, Size: 8125 bytes --]
Chris Wilson <chris@chris-wilson.co.uk> writes:
> We would like to start doing some bookkeeping at the beginning, between
> contexts and at the end of execlists submission. We already mark the
> beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
> when the HW is idle. This give us a pair of sequence points we can then
> expand on for further bookkeeping.
>
> v2: Refactor guc submission to share the same begin/end.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Francisco Jerez <currojerez@riseup.net>
> Reviewed-by: Francisco Jerez <currojerez@riseup.net> #v1
Thanks, v2 is also:
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
> ---
> drivers/gpu/drm/i915/intel_guc_submission.c | 17 ++++++----
> drivers/gpu/drm/i915/intel_lrc.c | 50 ++++++++++++++++++++++-------
> drivers/gpu/drm/i915/intel_ringbuffer.h | 15 ++++++++-
> 3 files changed, 63 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
> index 207cda062626..749f27916a02 100644
> --- a/drivers/gpu/drm/i915/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/intel_guc_submission.c
> @@ -728,7 +728,7 @@ static void guc_dequeue(struct intel_engine_cs *engine)
> execlists->first = rb;
> if (submit) {
> port_assign(port, last);
> - execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_begin(execlists, execlists->port);
> guc_submit(engine);
> }
>
> @@ -748,17 +748,20 @@ static void guc_submission_tasklet(unsigned long data)
> struct execlist_port *port = execlists->port;
> struct i915_request *rq;
>
> - rq = port_request(&port[0]);
> + rq = port_request(port);
> while (rq && i915_request_completed(rq)) {
> trace_i915_request_out(rq);
> i915_request_put(rq);
>
> - execlists_port_complete(execlists, port);
> -
> - rq = port_request(&port[0]);
> + port = execlists_port_complete(execlists, port);
> + if (port_isset(port)) {
> + execlists_user_begin(execlists, port);
> + rq = port_request(port);
> + } else {
> + execlists_user_end(execlists);
> + rq = NULL;
> + }
> }
> - if (!rq)
> - execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
>
> if (execlists_is_active(execlists, EXECLISTS_ACTIVE_PREEMPT) &&
> intel_read_status_page(engine, I915_GEM_HWS_PREEMPT_INDEX) ==
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f60b61bf8b3b..4d08875422b6 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -374,6 +374,19 @@ execlists_context_status_change(struct i915_request *rq, unsigned long status)
> status, rq);
> }
>
> +inline void
> +execlists_user_begin(struct intel_engine_execlists *execlists,
> + const struct execlist_port *port)
> +{
> + execlists_set_active_once(execlists, EXECLISTS_ACTIVE_USER);
> +}
> +
> +inline void
> +execlists_user_end(struct intel_engine_execlists *execlists)
> +{
> + execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
> +}
> +
> static inline void
> execlists_context_schedule_in(struct i915_request *rq)
> {
> @@ -711,7 +724,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> spin_unlock_irq(&engine->timeline->lock);
>
> if (submit) {
> - execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_begin(execlists, execlists->port);
> execlists_submit_ports(engine);
> }
>
> @@ -742,7 +755,7 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
> port++;
> }
>
> - execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_end(execlists);
> }
>
> static void clear_gtiir(struct intel_engine_cs *engine)
> @@ -873,7 +886,7 @@ static void execlists_submission_tasklet(unsigned long data)
> {
> struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
> struct intel_engine_execlists * const execlists = &engine->execlists;
> - struct execlist_port * const port = execlists->port;
> + struct execlist_port *port = execlists->port;
> struct drm_i915_private *dev_priv = engine->i915;
> bool fw = false;
>
> @@ -1012,10 +1025,28 @@ static void execlists_submission_tasklet(unsigned long data)
>
> GEM_BUG_ON(count == 0);
> if (--count == 0) {
> + /*
> + * On the final event corresponding to the
> + * submission of this context, we expect either
> + * an element-switch event or a completion
> + * event (and on completion, the active-idle
> + * marker). No more preemptions, lite-restore
> + * or otherwise.
> + */
> GEM_BUG_ON(status & GEN8_CTX_STATUS_PREEMPTED);
> GEM_BUG_ON(port_isset(&port[1]) &&
> !(status & GEN8_CTX_STATUS_ELEMENT_SWITCH));
> + GEM_BUG_ON(!port_isset(&port[1]) &&
> + !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
> +
> + /*
> + * We rely on the hardware being strongly
> + * ordered, that the breadcrumb write is
> + * coherent (visible from the CPU) before the
> + * user interrupt and CSB is processed.
> + */
> GEM_BUG_ON(!i915_request_completed(rq));
> +
> execlists_context_schedule_out(rq);
> trace_i915_request_out(rq);
> i915_request_put(rq);
> @@ -1023,17 +1054,14 @@ static void execlists_submission_tasklet(unsigned long data)
> GEM_TRACE("%s completed ctx=%d\n",
> engine->name, port->context_id);
>
> - execlists_port_complete(execlists, port);
> + port = execlists_port_complete(execlists, port);
> + if (port_isset(port))
> + execlists_user_begin(execlists, port);
> + else
> + execlists_user_end(execlists);
> } else {
> port_set(port, port_pack(rq, count));
> }
> -
> - /* After the final element, the hw should be idle */
> - GEM_BUG_ON(port_count(port) == 0 &&
> - !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
> - if (port_count(port) == 0)
> - execlists_clear_active(execlists,
> - EXECLISTS_ACTIVE_USER);
> }
>
> if (head != execlists->csb_head) {
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index a02c7b3b9d55..40461e29cdab 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -638,6 +638,13 @@ execlists_set_active(struct intel_engine_execlists *execlists,
> __set_bit(bit, (unsigned long *)&execlists->active);
> }
>
> +static inline bool
> +execlists_set_active_once(struct intel_engine_execlists *execlists,
> + unsigned int bit)
> +{
> + return !__test_and_set_bit(bit, (unsigned long *)&execlists->active);
> +}
> +
> static inline void
> execlists_clear_active(struct intel_engine_execlists *execlists,
> unsigned int bit)
> @@ -652,6 +659,10 @@ execlists_is_active(const struct intel_engine_execlists *execlists,
> return test_bit(bit, (unsigned long *)&execlists->active);
> }
>
> +void execlists_user_begin(struct intel_engine_execlists *execlists,
> + const struct execlist_port *port);
> +void execlists_user_end(struct intel_engine_execlists *execlists);
> +
> void
> execlists_cancel_port_requests(struct intel_engine_execlists * const execlists);
>
> @@ -664,7 +675,7 @@ execlists_num_ports(const struct intel_engine_execlists * const execlists)
> return execlists->port_mask + 1;
> }
>
> -static inline void
> +static inline struct execlist_port *
> execlists_port_complete(struct intel_engine_execlists * const execlists,
> struct execlist_port * const port)
> {
> @@ -675,6 +686,8 @@ execlists_port_complete(struct intel_engine_execlists * const execlists,
>
> memmove(port, port + 1, m * sizeof(struct execlist_port));
> memset(port + m, 0, sizeof(struct execlist_port));
> +
> + return port;
> }
>
> static inline unsigned int
> --
> 2.16.3
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915/execlists: Track begin/end of execlists submission sequences
2018-03-31 13:06 ` [PATCH v2] " Chris Wilson
2018-04-02 16:32 ` Francisco Jerez
@ 2018-04-03 11:17 ` Mika Kuoppala
1 sibling, 0 replies; 12+ messages in thread
From: Mika Kuoppala @ 2018-04-03 11:17 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> We would like to start doing some bookkeeping at the beginning, between
> contexts and at the end of execlists submission. We already mark the
> beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
> when the HW is idle. This give us a pair of sequence points we can then
> expand on for further bookkeeping.
>
> v2: Refactor guc submission to share the same begin/end.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Francisco Jerez <currojerez@riseup.net>
> Reviewed-by: Francisco Jerez <currojerez@riseup.net> #v1
> ---
> drivers/gpu/drm/i915/intel_guc_submission.c | 17 ++++++----
> drivers/gpu/drm/i915/intel_lrc.c | 50 ++++++++++++++++++++++-------
> drivers/gpu/drm/i915/intel_ringbuffer.h | 15 ++++++++-
> 3 files changed, 63 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
> index 207cda062626..749f27916a02 100644
> --- a/drivers/gpu/drm/i915/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/intel_guc_submission.c
> @@ -728,7 +728,7 @@ static void guc_dequeue(struct intel_engine_cs *engine)
> execlists->first = rb;
> if (submit) {
> port_assign(port, last);
> - execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_begin(execlists, execlists->port);
> guc_submit(engine);
> }
>
> @@ -748,17 +748,20 @@ static void guc_submission_tasklet(unsigned long data)
> struct execlist_port *port = execlists->port;
> struct i915_request *rq;
>
> - rq = port_request(&port[0]);
> + rq = port_request(port);
> while (rq && i915_request_completed(rq)) {
> trace_i915_request_out(rq);
> i915_request_put(rq);
>
> - execlists_port_complete(execlists, port);
> -
> - rq = port_request(&port[0]);
> + port = execlists_port_complete(execlists, port);
> + if (port_isset(port)) {
> + execlists_user_begin(execlists, port);
> + rq = port_request(port);
> + } else {
> + execlists_user_end(execlists);
> + rq = NULL;
I did ponder doing the user_begin/end pair in complete
but better not to hide it in there as we might end up
doing completes without notifying users.
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> + }
> }
> - if (!rq)
> - execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
>
> if (execlists_is_active(execlists, EXECLISTS_ACTIVE_PREEMPT) &&
> intel_read_status_page(engine, I915_GEM_HWS_PREEMPT_INDEX) ==
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index f60b61bf8b3b..4d08875422b6 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -374,6 +374,19 @@ execlists_context_status_change(struct i915_request *rq, unsigned long status)
> status, rq);
> }
>
> +inline void
> +execlists_user_begin(struct intel_engine_execlists *execlists,
> + const struct execlist_port *port)
> +{
> + execlists_set_active_once(execlists, EXECLISTS_ACTIVE_USER);
> +}
> +
> +inline void
> +execlists_user_end(struct intel_engine_execlists *execlists)
> +{
> + execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
> +}
> +
> static inline void
> execlists_context_schedule_in(struct i915_request *rq)
> {
> @@ -711,7 +724,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
> spin_unlock_irq(&engine->timeline->lock);
>
> if (submit) {
> - execlists_set_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_begin(execlists, execlists->port);
> execlists_submit_ports(engine);
> }
>
> @@ -742,7 +755,7 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
> port++;
> }
>
> - execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER);
> + execlists_user_end(execlists);
> }
>
> static void clear_gtiir(struct intel_engine_cs *engine)
> @@ -873,7 +886,7 @@ static void execlists_submission_tasklet(unsigned long data)
> {
> struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
> struct intel_engine_execlists * const execlists = &engine->execlists;
> - struct execlist_port * const port = execlists->port;
> + struct execlist_port *port = execlists->port;
> struct drm_i915_private *dev_priv = engine->i915;
> bool fw = false;
>
> @@ -1012,10 +1025,28 @@ static void execlists_submission_tasklet(unsigned long data)
>
> GEM_BUG_ON(count == 0);
> if (--count == 0) {
> + /*
> + * On the final event corresponding to the
> + * submission of this context, we expect either
> + * an element-switch event or a completion
> + * event (and on completion, the active-idle
> + * marker). No more preemptions, lite-restore
> + * or otherwise.
> + */
> GEM_BUG_ON(status & GEN8_CTX_STATUS_PREEMPTED);
> GEM_BUG_ON(port_isset(&port[1]) &&
> !(status & GEN8_CTX_STATUS_ELEMENT_SWITCH));
> + GEM_BUG_ON(!port_isset(&port[1]) &&
> + !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
> +
> + /*
> + * We rely on the hardware being strongly
> + * ordered, that the breadcrumb write is
> + * coherent (visible from the CPU) before the
> + * user interrupt and CSB is processed.
> + */
> GEM_BUG_ON(!i915_request_completed(rq));
> +
> execlists_context_schedule_out(rq);
> trace_i915_request_out(rq);
> i915_request_put(rq);
> @@ -1023,17 +1054,14 @@ static void execlists_submission_tasklet(unsigned long data)
> GEM_TRACE("%s completed ctx=%d\n",
> engine->name, port->context_id);
>
> - execlists_port_complete(execlists, port);
> + port = execlists_port_complete(execlists, port);
> + if (port_isset(port))
> + execlists_user_begin(execlists, port);
> + else
> + execlists_user_end(execlists);
> } else {
> port_set(port, port_pack(rq, count));
> }
> -
> - /* After the final element, the hw should be idle */
> - GEM_BUG_ON(port_count(port) == 0 &&
> - !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
> - if (port_count(port) == 0)
> - execlists_clear_active(execlists,
> - EXECLISTS_ACTIVE_USER);
> }
>
> if (head != execlists->csb_head) {
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index a02c7b3b9d55..40461e29cdab 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -638,6 +638,13 @@ execlists_set_active(struct intel_engine_execlists *execlists,
> __set_bit(bit, (unsigned long *)&execlists->active);
> }
>
> +static inline bool
> +execlists_set_active_once(struct intel_engine_execlists *execlists,
> + unsigned int bit)
> +{
> + return !__test_and_set_bit(bit, (unsigned long *)&execlists->active);
> +}
> +
> static inline void
> execlists_clear_active(struct intel_engine_execlists *execlists,
> unsigned int bit)
> @@ -652,6 +659,10 @@ execlists_is_active(const struct intel_engine_execlists *execlists,
> return test_bit(bit, (unsigned long *)&execlists->active);
> }
>
> +void execlists_user_begin(struct intel_engine_execlists *execlists,
> + const struct execlist_port *port);
> +void execlists_user_end(struct intel_engine_execlists *execlists);
> +
> void
> execlists_cancel_port_requests(struct intel_engine_execlists * const execlists);
>
> @@ -664,7 +675,7 @@ execlists_num_ports(const struct intel_engine_execlists * const execlists)
> return execlists->port_mask + 1;
> }
>
> -static inline void
> +static inline struct execlist_port *
> execlists_port_complete(struct intel_engine_execlists * const execlists,
> struct execlist_port * const port)
> {
> @@ -675,6 +686,8 @@ execlists_port_complete(struct intel_engine_execlists * const execlists,
>
> memmove(port, port + 1, m * sizeof(struct execlist_port));
> memset(port + m, 0, sizeof(struct execlist_port));
> +
> + return port;
> }
>
> static inline unsigned int
> --
> 2.16.3
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/i915/execlists: Track begin/end of execlists submission sequences
2018-04-02 16:32 ` Francisco Jerez
@ 2018-04-03 11:33 ` Chris Wilson
0 siblings, 0 replies; 12+ messages in thread
From: Chris Wilson @ 2018-04-03 11:33 UTC (permalink / raw)
To: Francisco Jerez, intel-gfx
Quoting Francisco Jerez (2018-04-02 17:32:20)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > We would like to start doing some bookkeeping at the beginning, between
> > contexts and at the end of execlists submission. We already mark the
> > beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication
> > when the HW is idle. This give us a pair of sequence points we can then
> > expand on for further bookkeeping.
> >
> > v2: Refactor guc submission to share the same begin/end.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Cc: Francisco Jerez <currojerez@riseup.net>
> > Reviewed-by: Francisco Jerez <currojerez@riseup.net> #v1
>
> Thanks, v2 is also:
>
> Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Pushed this as it should give us a common hook for the two series.
I belatedly remembered, that we do have a similar begin/end sequence
markers for *user* activity, mark_busy, mark_idle. These are signaled on
receipt of the first request from the user (may be an arbitrary time
before execution) and after completion of the final request, plus some
hysteresis of 100ms to 2s. It's not as exact as tracking activity on
execlists, but it would be nice if you could balance the pros/cons when
hooking up. That knowledge will be helpful for directing future api
changes, e.g. no one has done a thorough investigation of how far we can
push S0ix afaik.
-Chris
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2018-04-03 11:33 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-03-29 10:26 [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences Chris Wilson
2018-03-29 13:43 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-03-29 16:39 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-03-29 17:20 ` [PATCH] " Francisco Jerez
2018-03-31 12:40 ` Chris Wilson
2018-03-31 13:06 ` [PATCH v2] " Chris Wilson
2018-04-02 16:32 ` Francisco Jerez
2018-04-03 11:33 ` Chris Wilson
2018-04-03 11:17 ` Mika Kuoppala
2018-03-31 13:34 ` ✗ Fi.CI.BAT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) Patchwork
2018-03-31 14:03 ` ✓ Fi.CI.BAT: success " Patchwork
2018-03-31 14:47 ` ✗ Fi.CI.IGT: failure " Patchwork
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