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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v4 61/64] qemu/host-utils.h: Reduce the operation count in the fallback ctpop
Date: Fri, 09 Dec 2016 14:41:41 +0000	[thread overview]
Message-ID: <87twadxize.fsf@linaro.org> (raw)
In-Reply-To: <1479906121-12211-62-git-send-email-rth@twiddle.net>


Richard Henderson <rth@twiddle.net> writes:

> Signed-off-by: Richard Henderson <rth@twiddle.net>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

As it looked like we were messing about with the Hackers Delight
algorithms I thought it might be worth defending any changes with some
unit tests. Feel free to include the unit test bellow:

--8<---------------cut here---------------start------------->8---
>From 66857f0be793c86ce9aaa6e02ffccc6552f6e894 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>
Date: Fri, 9 Dec 2016 14:36:00 +0000
Subject: [PATCH] new: tests/test-bitcnt
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add some unit tests for bit count functions (currently only ctpop). As
the routines are based on the Hackers Delight optimisations I based
the test patterns on their tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/.gitignore       |   1 +
 tests/Makefile.include |   2 +
 tests/test-bitcnt.c    | 135 +++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 138 insertions(+)
 create mode 100644 tests/test-bitcnt.c

diff --git a/tests/.gitignore b/tests/.gitignore
index c0d7857538..96986efc1a 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -13,6 +13,7 @@ rcutorture
 test-aio
 test-base64
 test-bitops
+test-bitcnt
 test-blockjob
 test-blockjob-txn
 test-bufferiszero
diff --git a/tests/Makefile.include b/tests/Makefile.include
index e98d3b6bb3..8b85c5399a 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -81,6 +81,7 @@ gcov-files-test-qht-y = util/qht.c
 check-unit-y += tests/test-qht-par$(EXESUF)
 gcov-files-test-qht-par-y = util/qht.c
 check-unit-y += tests/test-bitops$(EXESUF)
+check-unit-y += tests/test-bitcnt$(EXESUF)
 check-unit-$(CONFIG_HAS_GLIB_SUBPROCESS_TESTS) += tests/test-qdev-global-props$(EXESUF)
 check-unit-y += tests/check-qom-interface$(EXESUF)
 gcov-files-check-qom-interface-y = qom/object.c
@@ -570,6 +571,7 @@ tests/test-opts-visitor$(EXESUF): tests/test-opts-visitor.o $(test-qapi-obj-y)

 tests/test-mul64$(EXESUF): tests/test-mul64.o $(test-util-obj-y)
 tests/test-bitops$(EXESUF): tests/test-bitops.o $(test-util-obj-y)
+tests/test-bitcnt$(EXESUF): tests/test-bitcnt.o $(test-util-obj-y)
 tests/test-crypto-hash$(EXESUF): tests/test-crypto-hash.o $(test-crypto-obj-y)
 tests/test-crypto-cipher$(EXESUF): tests/test-crypto-cipher.o $(test-crypto-obj-y)
 tests/test-crypto-secret$(EXESUF): tests/test-crypto-secret.o $(test-crypto-obj-y)
diff --git a/tests/test-bitcnt.c b/tests/test-bitcnt.c
new file mode 100644
index 0000000000..3969b32803
--- /dev/null
+++ b/tests/test-bitcnt.c
@@ -0,0 +1,135 @@
+/*
+ * Test bit count routines
+ *
+ * This work is licensed under the terms of the GNU LGPL, version 2 or later.
+ * See the COPYING.LIB file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/host-utils.h"
+
+struct bitcnt_test_data {
+    /* value to count */
+    union {
+        uint8_t  w8;
+        uint16_t w16;
+        uint32_t w32;
+        uint64_t w64;
+    } value;
+    /* expected result */
+    int popct;
+};
+
+struct bitcnt_test_data eight_bit_data[] = {
+    { { .w8 = 0x01 }, .popct=1 },
+    { { .w8 = 0x03 }, .popct=2 },
+    { { .w8 = 0x04 }, .popct=1 },
+    { { .w8 = 0x0f }, .popct=4 },
+    { { .w8 = 0x3f }, .popct=6 },
+    { { .w8 = 0x40 }, .popct=1 },
+    { { .w8 = 0xf0 }, .popct=4 },
+    { { .w8 = 0x7f }, .popct=7 },
+    { { .w8 = 0x80 }, .popct=1 },
+    { { .w8 = 0xf1 }, .popct=5 },
+    { { .w8 = 0xfe }, .popct=7 },
+    { { .w8 = 0xff }, .popct=8 },
+};
+
+static void test_ctpop8(void)
+{
+    int i;
+
+    for (i = 0; i < ARRAY_SIZE(eight_bit_data); i++) {
+        struct bitcnt_test_data *d = &eight_bit_data[i];
+        g_assert(ctpop8(d->value.w8)==d->popct);
+    }
+}
+
+struct bitcnt_test_data sixteen_bit_data[] = {
+    { { .w16 = 0x0001 }, .popct=1 },
+    { { .w16 = 0x0003 }, .popct=2 },
+    { { .w16 = 0x000f }, .popct=4 },
+    { { .w16 = 0x003f }, .popct=6 },
+    { { .w16 = 0x00f0 }, .popct=4 },
+    { { .w16 = 0x0f0f }, .popct=8 },
+    { { .w16 = 0x1f1f }, .popct=10 },
+    { { .w16 = 0x4000 }, .popct=1 },
+    { { .w16 = 0x4001 }, .popct=2 },
+    { { .w16 = 0x7000 }, .popct=3 },
+    { { .w16 = 0x7fff }, .popct=15 },
+};
+
+static void test_ctpop16(void)
+{
+    int i;
+
+    for (i = 0; i < ARRAY_SIZE(sixteen_bit_data); i++) {
+        struct bitcnt_test_data *d = &sixteen_bit_data[i];
+        g_assert(ctpop16(d->value.w16)==d->popct);
+    }
+}
+
+struct bitcnt_test_data thirtytwo_bit_data[] = {
+    { { .w32 = 0x00000001 }, .popct=1 },
+    { { .w32 = 0x0000000f }, .popct=4 },
+    { { .w32 = 0x00000f0f }, .popct=8 },
+    { { .w32 = 0x00001f1f }, .popct=10 },
+    { { .w32 = 0x00004001 }, .popct=2 },
+    { { .w32 = 0x00007000 }, .popct=3 },
+    { { .w32 = 0x00007fff }, .popct=15 },
+    { { .w32 = 0x55555555 }, .popct=16 },
+    { { .w32 = 0xaaaaaaaa }, .popct=16 },
+    { { .w32 = 0xff000000 }, .popct=8 },
+    { { .w32 = 0xc0c0c0c0 }, .popct=8 },
+    { { .w32 = 0x0ffffff0 }, .popct=24 },
+    { { .w32 = 0x80000000 }, .popct=1 },
+    { { .w32 = 0xffffffff }, .popct=32 },
+};
+
+static void test_ctpop32(void)
+{
+    int i;
+
+    for (i = 0; i < ARRAY_SIZE(thirtytwo_bit_data); i++) {
+        struct bitcnt_test_data *d = &thirtytwo_bit_data[i];
+        g_assert(ctpop32(d->value.w32)==d->popct);
+    }
+}
+
+struct bitcnt_test_data sixtyfour_bit_data[] = {
+    { { .w64 = 0x0000000000000001 }, .popct=1 },
+    { { .w64 = 0x000000000000000f }, .popct=4 },
+    { { .w64 = 0x0000000000000f0f }, .popct=8 },
+    { { .w64 = 0x0000000000001f1f }, .popct=10 },
+    { { .w64 = 0x0000000000004001 }, .popct=2 },
+    { { .w64 = 0x0000000000007000 }, .popct=3 },
+    { { .w64 = 0x0000000000007fff }, .popct=15 },
+    { { .w64 = 0x0000005500555555 }, .popct=16 },
+    { { .w64 = 0x00aa0000aaaa00aa }, .popct=16 },
+    { { .w64 = 0x000f000000f00000 }, .popct=8 },
+    { { .w64 = 0x0c0c0000c0c0c0c0 }, .popct=12 },
+    { { .w64 = 0xf00f00f0f0f0f000 }, .popct=24 },
+    { { .w64 = 0x8000000000000000 }, .popct=1 },
+    { { .w64 = 0xf0f0f0f0f0f0f0f0 }, .popct=32 },
+};
+
+static void test_ctpop64(void)
+{
+    int i;
+
+    for (i = 0; i < ARRAY_SIZE(sixtyfour_bit_data); i++) {
+        struct bitcnt_test_data *d = &sixtyfour_bit_data[i];
+        g_assert(ctpop64(d->value.w64)==d->popct);
+    }
+}
+
+int main(int argc, char **argv)
+{
+    g_test_init(&argc, &argv, NULL);
+    g_test_add_func("/bitcnt/ctpop8", test_ctpop8);
+    g_test_add_func("/bitcnt/ctpop16", test_ctpop16);
+    g_test_add_func("/bitcnt/ctpop32", test_ctpop32);
+    g_test_add_func("/bitcnt/ctpop64", test_ctpop64);
+    return g_test_run();
+}
--
2.11.0


--8<---------------cut here---------------end--------------->8---

  reply	other threads:[~2016-12-09 14:42 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-23 13:00 [Qemu-devel] [PATCH v4 00/64] tcg 2.9 patch queue Richard Henderson
2016-11-23 13:00 ` [Qemu-devel] [PATCH v4 01/64] tcg: Add field extraction primitives Richard Henderson
2016-12-05 13:17   ` Alex Bennée
2016-12-05 15:14     ` Richard Henderson
2016-11-23 13:00 ` [Qemu-devel] [PATCH v4 02/64] tcg: Minor adjustments to deposit expanders Richard Henderson
2016-12-05 13:18   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 03/64] tcg: Add deposit_z expander Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 04/64] tcg/aarch64: Implement field extraction opcodes Richard Henderson
2016-12-06 12:24   ` Alex Bennée
2016-12-06 16:36     ` Richard Henderson
2016-12-09 15:41       ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 05/64] tcg/arm: Move isa detection to tcg-target.h Richard Henderson
2016-12-06 12:34   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 06/64] tcg/arm: Implement field extraction opcodes Richard Henderson
2016-12-06 16:16   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 07/64] tcg/i386: " Richard Henderson
2016-11-25 11:16   ` Paolo Bonzini
2016-11-25 11:21     ` Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 08/64] tcg/mips: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 09/64] tcg/ppc: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 10/64] tcg/s390: Expose host facilities to tcg-target.h Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 11/64] tcg/s390: Implement field extraction opcodes Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 12/64] tcg/s390: Support deposit into zero Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 13/64] target-alpha: Use deposit and extract ops Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 14/64] target-arm: Use new " Richard Henderson
2016-12-01 17:19   ` Alex Bennée
2016-12-03 21:01     ` Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 15/64] target-i386: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 16/64] target-mips: Use the new extract op Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 17/64] target-ppc: Use the new deposit and extract ops Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 18/64] target-s390x: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 19/64] tcg/optimize: Fold movcond 0/1 into setcond Richard Henderson
2016-12-06 16:22   ` Alex Bennée
2016-12-06 16:33     ` Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 20/64] tcg: Add markup for output requires new register Richard Henderson
2016-12-06 16:34   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 21/64] tcg: Transition flat op_defs array to a target callback Richard Henderson
2016-12-06 16:38   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 22/64] tcg: Pass the opcode width to target_parse_constraint Richard Henderson
2016-12-06 16:43   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 23/64] tcg: Allow an operand to be matching or a constant Richard Henderson
2016-12-08 17:19   ` Alex Bennée
2016-12-08 17:49     ` Richard Henderson
2016-12-08 20:38       ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 24/64] tcg: Add clz and ctz opcodes Richard Henderson
2016-12-08 17:44   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 25/64] disas/i386.c: Handle tzcnt Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 26/64] disas/ppc: Handle popcnt and cnttz Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 27/64] target-alpha: Use the ctz and clz opcodes Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 28/64] target-cris: Use clz opcode Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 29/64] target-microblaze: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 30/64] target-mips: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 31/64] target-openrisc: Use clz and ctz opcodes Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 32/64] target-ppc: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 33/64] target-s390x: Use clz opcode Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 34/64] target-tilegx: Use clz and ctz opcodes Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 35/64] target-tricore: Use clz opcode Richard Henderson
2016-11-23 14:58   ` Bastian Koppelmann
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 36/64] target-unicore32: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 37/64] target-xtensa: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 38/64] target-arm: " Richard Henderson
2016-12-08 17:47   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 39/64] target-i386: Use clz and ctz opcodes Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 40/64] tcg/ppc: Handle ctz and clz opcodes Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 41/64] tcg/aarch64: " Richard Henderson
2016-12-01 18:36   ` Alex Bennée
2016-12-01 18:44     ` Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 42/64] tcg/arm: " Richard Henderson
2016-12-08 17:56   ` Alex Bennée
2016-12-08 18:13     ` Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 43/64] tcg/mips: Handle clz opcode Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 44/64] tcg/s390: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 45/64] tcg/i386: Fuly convert tcg_target_op_def Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 46/64] tcg/i386: Hoist common arguments in tcg_out_op Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 47/64] tcg/i386: Allow bmi2 shiftx to have non-matching operands Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 48/64] tcg/i386: Handle ctz and clz opcodes Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 49/64] tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 50/64] tcg: Add helpers for clrsb Richard Henderson
2016-12-09  9:51   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 51/64] target-arm: Use clrsb helper Richard Henderson
2016-12-09  9:52   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 52/64] target-tricore: " Richard Henderson
2016-11-23 14:58   ` Bastian Koppelmann
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 53/64] target-xtensa: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 54/64] tcg: Add opcode for ctpop Richard Henderson
2016-12-09  9:57   ` Alex Bennée
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 55/64] target-alpha: Use ctpop helper Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 56/64] target-ppc: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 57/64] target-s390x: Avoid a loop for popcnt Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 58/64] target-sparc: Use ctpop helper Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 59/64] target-tilegx: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 60/64] target-i386: " Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 61/64] qemu/host-utils.h: Reduce the operation count in the fallback ctpop Richard Henderson
2016-12-09 14:41   ` Alex Bennée [this message]
2016-12-09 17:18     ` Richard Henderson
2016-11-23 13:01 ` [Qemu-devel] [PATCH v4 62/64] tcg: Use ctpop to generate ctz if needed Richard Henderson
2016-12-09 16:07   ` Alex Bennée
2016-12-09 16:48     ` Richard Henderson
2016-11-23 13:02 ` [Qemu-devel] [PATCH v4 63/64] tcg/ppc: Handle ctpop opcode Richard Henderson
2016-11-23 13:02 ` [Qemu-devel] [PATCH v4 64/64] tcg/i386: " Richard Henderson
2016-11-29 13:33 ` [Qemu-devel] [PATCH v4 00/64] tcg 2.9 patch queue no-reply
2016-12-09 16:08 ` Alex Bennée

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