From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760643AbbIDUe1 (ORCPT ); Fri, 4 Sep 2015 16:34:27 -0400 Received: from albireo.enyo.de ([46.237.207.196]:60390 "EHLO albireo.enyo.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760606AbbIDUe0 (ORCPT ); Fri, 4 Sep 2015 16:34:26 -0400 From: Florian Weimer To: Dave Hansen Cc: One Thousand Gnomes , linux-kernel@vger.kernel.org, x86@kernel.org Subject: Re: [PATCH 07/12] mm: Pass the 4-bit protection key in via PROT_ bits to syscalls References: <20150507174132.34AF8FAF@viggo.jf.intel.com> <20150507174135.FD8A0FA9@viggo.jf.intel.com> <20150507201151.5658faa1@lxorguk.ukuu.org.uk> <554BBABB.9070207@sr71.net> Date: Fri, 04 Sep 2015 22:13:46 +0200 In-Reply-To: <554BBABB.9070207@sr71.net> (Dave Hansen's message of "Thu, 07 May 2015 12:19:23 -0700") Message-ID: <87twraeydh.fsf@mid.deneb.enyo.de> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Dave Hansen: > On 05/07/2015 12:11 PM, One Thousand Gnomes wrote: >>> diff -puN >>> include/uapi/asm-generic/mman-common.h~pkeys-11-user-abi-bits >>> include/uapi/asm-generic/mman-common.h >>> --- a/include/uapi/asm-generic/mman-common.h~pkeys-11-user-abi-bits >>> 2015-05-07 10:31:43.367276719 -0700 >>> +++ b/include/uapi/asm-generic/mman-common.h 2015-05-07 >>> 10:31:43.370276855 -0700 >>> @@ -10,6 +10,10 @@ >>> #define PROT_WRITE 0x2 /* page can be written */ >>> #define PROT_EXEC 0x4 /* page can be executed */ >>> #define PROT_SEM 0x8 /* page may be used for atomic ops */ >>> +#define PROT_PKEY0 0x10 /* protection key value (bit 0) */ >>> +#define PROT_PKEY1 0x20 /* protection key value (bit 1) */ >>> +#define PROT_PKEY2 0x40 /* protection key value (bit 2) */ >>> +#define PROT_PKEY3 0x80 /* protection key value (bit 3) */ >> >> Thats leaking deep Intelisms into asm-generic which makes me very >> uncomfortable. Whether we need to reserve some bits for "arch specific" >> is one question, what we do with them ought not to be leaking out. >> >> To start with trying to port code people will want to do >> >> #define PROT_PKEY0 0 >> #define PROT_PKEY1 0 > > Yeah, I feel pretty uncomfortable with it as well. I really don't > expect these to live like this in asm-generic when I submit this. > > Powerpc and ia64 have _something_ resembling protection keys, so the > concept isn't entirely x86 or Intel-specific. My hope would be that we > do this in a way that other architectures can use. It will also be very painful to add additional bits. We went through this with the CPU affinity mask, and it still hurts it. Please use a more sensible interface from the start. :)