From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support Date: Tue, 28 Apr 2015 15:37:01 +0100 Message-ID: <87tww0qqh9.fsf@linaro.org> References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150414082558.GS6186@cbox> <87y4li6hua.fsf@linaro.org> <20150427200407.GG23335@cbox> <87wq0wr6dd.fsf@linaro.org> <20150428125645.GA4137@cbox> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 5A1E84ED37 for ; Tue, 28 Apr 2015 10:28:26 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id N2Pi36iJjb5j for ; Tue, 28 Apr 2015 10:28:22 -0400 (EDT) Received: from socrates.bennee.com (static.88-198-71-155.clients.your-server.de [88.198.71.155]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 3566B4ED32 for ; Tue, 28 Apr 2015 10:28:21 -0400 (EDT) In-reply-to: <20150428125645.GA4137@cbox> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Christoffer Dall Cc: Russell King , kvm-devel , Jonathan Corbet , Marc Zyngier , "J. Kiszka" , "open list:DOCUMENTATION" , Will Deacon , open list , David Hildenbrand , Catalin Marinas , Zhichao Huang , Bharat Bhushan , Paolo Bonzini , bp@suse.de, Gleb Natapov , "kvmarm@lists.cs.columbia.edu" , arm-mail-list List-Id: kvmarm@lists.cs.columbia.edu CkNocmlzdG9mZmVyIERhbGwgPGNocmlzdG9mZmVyLmRhbGxAbGluYXJvLm9yZz4gd3JpdGVzOgoK PiBPbiBUdWUsIEFwciAyOCwgMjAxNSBhdCAxMDozNDoxMkFNICswMTAwLCBQZXRlciBNYXlkZWxs IHdyb3RlOgo+PiBPbiAyOCBBcHJpbCAyMDE1IGF0IDA5OjQyLCBBbGV4IEJlbm7DqWUgPGFsZXgu YmVubmVlQGxpbmFyby5vcmc+IHdyb3RlOgo+PiA+IFBldGVyIE1heWRlbGwgPHBldGVyLm1heWRl bGxAbGluYXJvLm9yZz4gd3JpdGVzOgo+PiA+PiBEb2VzIHRoZSBrZXJuZWwgYWxyZWFkeSBoYXZl IGEgY29udmVuaWVudGx5IGltcGxlbWVudGVkICJpbmplY3QKPj4gPj4gZXhjZXB0aW9uIGludG8g Z3Vlc3QiIGx1bXAgb2YgY29kZT8gSWYgc28gaXQgbWlnaHQgYmUgbGVzcyBlZmZvcnQKPj4gPj4g dG8gZG8gaXQgdGhhdCB3YXkgcm91bmQsIG1heWJlLgo+PiA+Cj4+ID4gU28geW91IHBvaW50ZWQg b3V0IHdlIGNhbid0IGp1c3QgcmUtaW5qZWN0IHRoZSBleGNlcHRpb25zIHdlIGdldCBhcyB3ZQo+ PiA+IG5lZWQgdG8gbWFwIGZyb20gdGhpbmdzIGxpa2UgRVNSX0VMeF9FQ19XQVRDSFBUX0xPVyB0 bwo+PiA+IEVTUl9FTHhfRUNfV0FUQ0hQVF9DVVIgYmVmb3JlIHJlLWluamVjdGlvbi4KPj4gPgo+ PiA+IE9mIGNvdXJzZSBpZiBpdCBpcyBhcyBzaW1wbGUgYXMgbW9kaWZ5aW5nIHRoZSBFU1JfRUwx IHJlZ2lzdGVyIGFuZAo+PiA+IHJldHVybmluZyArdmUgaW4gdGhlIGhhbmRsZV9leGl0IHBhdGgg dGhlbiBJIGNhbiBkbyB0aGF0IGJ1dCBJIGFzc3VtZWQKPj4gPiBpZiBhbnkgb3RoZXIgd3Jhbmds aW5nIG5lZWRzIGRvaW5nIGl0IHNob3VsZCBiZSBkb25lIGluIHVzZXJzcGFjZS4KPj4gCj4+IFdl bGwsIHNvbWVib2R5J3MgZ290IHRvIGRvIGl0LCBhbmQgaXQncyB0aGUgc2FtZSBhbW91bnQgb2Yg d29yawo+PiBlaXRoZXIgd2F5IChmaWRkbGluZyB3aXRoIEVTUiwgbWFraW5nIHN1cmUgd2UgZGly ZWN0IHRoZSBndWVzdAo+PiB0byB0aGUgcmlnaHQgZXhjZXB0aW9uIHZlY3RvciBlbnRyeSBwb2lu dCwgbWF5YmUgYSBmZXcgb3RoZXIKPj4gdGhpbmdzKS4KPj4gCj4gV2UgYWxyZWFkeSBoYXZlIGNv ZGUgaW4gdGhlIGtlcm5lbCB0byBpbmplY3QgZGF0YS9pbnN0cnVjdGlvbiBhYm9ydHMsCj4gYnV0 IG5vdCBzdXJlIGhvdyBtdWNoIGJlbmVmaXQgdGhlcmUgaXMgaW4gcmUtdXNpbmcgdGhhdC4gIEl0 J3MgdXAgdG8geW91Cj4gcmVhbGx5LCBidXQgSSB0aGluayB0aGUga2VybmVsIGNvZGUgc2hvdWxk IGJlIGNsZWFyIGFib3V0IHdoYXQgdGhlCj4gaW50ZW50aW9uIGlzIHNvIHRoYXQgd2UgZG9uJ3Qg ZW5kIHVwIGluIGEgc2l0dWF0aW9uIHdoZXJlOiAoMSkgVGhlCj4gaW50ZW5kZWQgYmVoYXZpb3Ig aXMgdW5jbGVhci92YWd1ZSwgYW5kICgyKSBpdCBkb2Vzbid0IGFjdHVhbGx5IHdvcmsgaW4KPiBw cmFjdGljZSBzbyBub2JvZHkgY2FuIGZvbGxvdyB0aGUgY29kZS4KCkNlcnRhaW5seSB0aGVyZSBh cmUgc29tZSBjYXNlcyB3aGVyZSB0aGUga2VybmVsIGRvZXNuJ3QgaGF2ZSBhbGwgdGhlCmluZm9y bWF0aW9uLiBGb3IgZXhhbXBsZSBpdCBkb2Vzbid0IGtub3cgaWYgdGhlIHNvZnQgYnJlYWsgd2Fz IGluc2VydGVkCmJ5IHRoZSBndWVzdCBvciB0aGUgaG9zdC4gVGhhdCB0byBtZSBmYXZvdXJzIHRo ZSAibGV0IHVzZXJzcGFjZSBkZWFsCndpdGggdGhlIHVnbHkiIGFwcHJvYWNoLgoKLS0gCkFsZXgg QmVubsOpZQpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpr dm1hcm0gbWFpbGluZyBsaXN0Cmt2bWFybUBsaXN0cy5jcy5jb2x1bWJpYS5lZHUKaHR0cHM6Ly9s aXN0cy5jcy5jb2x1bWJpYS5lZHUvbWFpbG1hbi9saXN0aW5mby9rdm1hcm0K From mboxrd@z Thu Jan 1 00:00:00 1970 From: alex.bennee@linaro.org (Alex =?utf-8?Q?Benn=C3=A9e?=) Date: Tue, 28 Apr 2015 15:37:01 +0100 Subject: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support In-Reply-To: <20150428125645.GA4137@cbox> References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150414082558.GS6186@cbox> <87y4li6hua.fsf@linaro.org> <20150427200407.GG23335@cbox> <87wq0wr6dd.fsf@linaro.org> <20150428125645.GA4137@cbox> Message-ID: <87tww0qqh9.fsf@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Christoffer Dall writes: > On Tue, Apr 28, 2015 at 10:34:12AM +0100, Peter Maydell wrote: >> On 28 April 2015 at 09:42, Alex Benn?e wrote: >> > Peter Maydell writes: >> >> Does the kernel already have a conveniently implemented "inject >> >> exception into guest" lump of code? If so it might be less effort >> >> to do it that way round, maybe. >> > >> > So you pointed out we can't just re-inject the exceptions we get as we >> > need to map from things like ESR_ELx_EC_WATCHPT_LOW to >> > ESR_ELx_EC_WATCHPT_CUR before re-injection. >> > >> > Of course if it is as simple as modifying the ESR_EL1 register and >> > returning +ve in the handle_exit path then I can do that but I assumed >> > if any other wrangling needs doing it should be done in userspace. >> >> Well, somebody's got to do it, and it's the same amount of work >> either way (fiddling with ESR, making sure we direct the guest >> to the right exception vector entry point, maybe a few other >> things). >> > We already have code in the kernel to inject data/instruction aborts, > but not sure how much benefit there is in re-using that. It's up to you > really, but I think the kernel code should be clear about what the > intention is so that we don't end up in a situation where: (1) The > intended behavior is unclear/vague, and (2) it doesn't actually work in > practice so nobody can follow the code. Certainly there are some cases where the kernel doesn't have all the information. For example it doesn't know if the soft break was inserted by the guest or the host. That to me favours the "let userspace deal with the ugly" approach. -- Alex Benn?e From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031127AbbD1Ohu (ORCPT ); Tue, 28 Apr 2015 10:37:50 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:51230 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030319AbbD1Ohq (ORCPT ); Tue, 28 Apr 2015 10:37:46 -0400 References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150414082558.GS6186@cbox> <87y4li6hua.fsf@linaro.org> <20150427200407.GG23335@cbox> <87wq0wr6dd.fsf@linaro.org> <20150428125645.GA4137@cbox> From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Christoffer Dall Cc: Peter Maydell , kvm-devel , arm-mail-list , "kvmarm\@lists.cs.columbia.edu" , Marc Zyngier , Alexander Graf , Andrew Jones , Paolo Bonzini , Zhichao Huang , "J. Kiszka" , David Hildenbrand , Bharat Bhushan , bp@suse.de, Gleb Natapov , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , "open list\:DOCUMENTATION" , open list Subject: Re: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support Message-ID: <87tww0qqh9.fsf@linaro.org> In-reply-to: <20150428125645.GA4137@cbox> Date: Tue, 28 Apr 2015 15:37:01 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Christoffer Dall writes: > On Tue, Apr 28, 2015 at 10:34:12AM +0100, Peter Maydell wrote: >> On 28 April 2015 at 09:42, Alex Bennée wrote: >> > Peter Maydell writes: >> >> Does the kernel already have a conveniently implemented "inject >> >> exception into guest" lump of code? If so it might be less effort >> >> to do it that way round, maybe. >> > >> > So you pointed out we can't just re-inject the exceptions we get as we >> > need to map from things like ESR_ELx_EC_WATCHPT_LOW to >> > ESR_ELx_EC_WATCHPT_CUR before re-injection. >> > >> > Of course if it is as simple as modifying the ESR_EL1 register and >> > returning +ve in the handle_exit path then I can do that but I assumed >> > if any other wrangling needs doing it should be done in userspace. >> >> Well, somebody's got to do it, and it's the same amount of work >> either way (fiddling with ESR, making sure we direct the guest >> to the right exception vector entry point, maybe a few other >> things). >> > We already have code in the kernel to inject data/instruction aborts, > but not sure how much benefit there is in re-using that. It's up to you > really, but I think the kernel code should be clear about what the > intention is so that we don't end up in a situation where: (1) The > intended behavior is unclear/vague, and (2) it doesn't actually work in > practice so nobody can follow the code. Certainly there are some cases where the kernel doesn't have all the information. For example it doesn't know if the soft break was inserted by the guest or the host. That to me favours the "let userspace deal with the ugly" approach. -- Alex Bennée