diff for duplicates of <87txfhmdi3.fsf@linaro.org> diff --git a/a/1.txt b/N1/1.txt index 1958b9c..3bb001e 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,16 +1,16 @@ -Haojian Zhuang <haojian.zhuang@linaro.org> writes: +Haojian Zhuang <haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> writes: -> On 7 November 2013 18:30, Dinh Nguyen <dinh.linux@gmail.com> wrote: +> On 7 November 2013 18:30, Dinh Nguyen <dinh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote: >> >> On 11/7/13 2:41 AM, Haojian Zhuang wrote: ->>> From: Zhangfei Gao <zhangfei.gao@linaro.org> +>>> From: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> >>> >>> Enable SMP support on hi3xxx platform >>> ->>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> ->>> Tested-by: Zhang Mingjun <zhang.mingjun@linaro.org> ->>> Tested-by: Li Xin <li.xin@linaro.org> ->>> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> +>>> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> +>>> Tested-by: Zhang Mingjun <zhang.mingjun-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> +>>> Tested-by: Li Xin <li.xin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> +>>> Signed-off-by: Haojian Zhuang <haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> >>> --- >>> .../bindings/arm/hisilicon/hisilicon.txt | 30 ++++++-- >>> arch/arm/boot/dts/hi3620.dtsi | 38 ++++++++++ @@ -57,7 +57,7 @@ Haojian Zhuang <haojian.zhuang@linaro.org> writes: >>> +Example: >>> + >>> + /* for Hi3620 */ ->>> + sysctrl: system-controller at fc802000 { +>>> + sysctrl: system-controller@fc802000 { >>> + compatible = "hisilicon,sysctrl"; >>> + reg = <0xfc802000 0x1000>; >>> + smp-offset = <0x31c>; @@ -73,21 +73,21 @@ Haojian Zhuang <haojian.zhuang@linaro.org> writes: >>> next-level-cache = <&L2>; >>> }; >>> + ->>> + cpu at 1 { +>>> + cpu@1 { >>> + compatible = "arm,cortex-a9"; >>> + device_type = "cpu"; >>> + reg = <1>; >>> + next-level-cache = <&L2>; >>> + }; >>> + ->>> + cpu at 2 { +>>> + cpu@2 { >>> + compatible = "arm,cortex-a9"; >>> + device_type = "cpu"; >>> + reg = <2>; >>> + next-level-cache = <&L2>; >>> + }; >>> + ->>> + cpu at 3 { +>>> + cpu@3 { >>> + compatible = "arm,cortex-a9"; >>> + device_type = "cpu"; >>> + reg = <3>; @@ -100,7 +100,7 @@ Haojian Zhuang <haojian.zhuang@linaro.org> writes: >>> reg = <0x1000 0x1000>, <0x100 0x100>; >>> }; >>> ->>> + sysctrl: system-controller at 802000 { +>>> + sysctrl: system-controller@802000 { >>> + compatible = "hisilicon,sysctrl"; >>> + reg = <0x802000 0x1000>; >>> + #address-cells = <1>; @@ -111,14 +111,14 @@ Haojian Zhuang <haojian.zhuang@linaro.org> writes: >>> + reboot-offset = <0x4>; >>> + }; >>> + ->>> dual_timer0: dual_timer at 800000 { +>>> dual_timer0: dual_timer@800000 { >>> compatible = "arm,sp804", "arm,primecell"; >>> reg = <0x800000 0x1000>; >>> @@ -115,6 +147,12 @@ >>> status = "disabled"; >>> }; >>> ->>> + timer5: timer at 600 { +>>> + timer5: timer@600 { >>> + compatible = "arm,cortex-a9-twd-timer"; >>> + reg = <0x600 0x20>; >>> + interrupts = <1 13 0xf01>; @@ -133,3 +133,7 @@ real clocks are in place? Otherwise it seems twd_get_clock() is going to fail. Kevin +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index db7f8c5..8f135a2 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,25 +2,41 @@ "ref\01383813691-31587-6-git-send-email-haojian.zhuang@linaro.org\0" "ref\0527B6BCA.2010606@gmail.com\0" "ref\0CAD6h2NRTc42YAKr6zLdMpiYbpBLatA9HNpZeFa3pZZpvJXBuCg@mail.gmail.com\0" - "From\0khilman@linaro.org (Kevin Hilman)\0" - "Subject\0[PATCH v11 5/6] ARM: hi3xxx: add smp support\0" + "ref\0CAD6h2NRTc42YAKr6zLdMpiYbpBLatA9HNpZeFa3pZZpvJXBuCg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" + "From\0Kevin Hilman <khilman-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Subject\0Re: [PATCH v11 5/6] ARM: hi3xxx: add smp support\0" "Date\0Tue, 12 Nov 2013 15:00:52 -0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Haojian Zhuang <haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Cc\0Dinh Nguyen <dinh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>" + Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> + Russell King - ARM Linux <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> + Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org> + Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org> + linux-arm-kernel@lists.infradead.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> + tglx@linutronix.de <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> + Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> + Shaojie Sun <shaojie.sun-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + Patch Tracking <patches-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + " Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" "\00:1\0" "b\0" - "Haojian Zhuang <haojian.zhuang@linaro.org> writes:\n" + "Haojian Zhuang <haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> writes:\n" "\n" - "> On 7 November 2013 18:30, Dinh Nguyen <dinh.linux@gmail.com> wrote:\n" + "> On 7 November 2013 18:30, Dinh Nguyen <dinh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:\n" ">>\n" ">> On 11/7/13 2:41 AM, Haojian Zhuang wrote:\n" - ">>> From: Zhangfei Gao <zhangfei.gao@linaro.org>\n" + ">>> From: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" ">>>\n" ">>> Enable SMP support on hi3xxx platform\n" ">>>\n" - ">>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>\n" - ">>> Tested-by: Zhang Mingjun <zhang.mingjun@linaro.org>\n" - ">>> Tested-by: Li Xin <li.xin@linaro.org>\n" - ">>> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>\n" + ">>> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" + ">>> Tested-by: Zhang Mingjun <zhang.mingjun-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" + ">>> Tested-by: Li Xin <li.xin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" + ">>> Signed-off-by: Haojian Zhuang <haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" ">>> ---\n" ">>> .../bindings/arm/hisilicon/hisilicon.txt | 30 ++++++--\n" ">>> arch/arm/boot/dts/hi3620.dtsi | 38 ++++++++++\n" @@ -67,7 +83,7 @@ ">>> +Example:\n" ">>> +\n" ">>> + /* for Hi3620 */\n" - ">>> + sysctrl: system-controller at fc802000 {\n" + ">>> + sysctrl: system-controller@fc802000 {\n" ">>> + compatible = \"hisilicon,sysctrl\";\n" ">>> + reg = <0xfc802000 0x1000>;\n" ">>> + smp-offset = <0x31c>;\n" @@ -83,21 +99,21 @@ ">>> next-level-cache = <&L2>;\n" ">>> };\n" ">>> +\n" - ">>> + cpu at 1 {\n" + ">>> + cpu@1 {\n" ">>> + compatible = \"arm,cortex-a9\";\n" ">>> + device_type = \"cpu\";\n" ">>> + reg = <1>;\n" ">>> + next-level-cache = <&L2>;\n" ">>> + };\n" ">>> +\n" - ">>> + cpu at 2 {\n" + ">>> + cpu@2 {\n" ">>> + compatible = \"arm,cortex-a9\";\n" ">>> + device_type = \"cpu\";\n" ">>> + reg = <2>;\n" ">>> + next-level-cache = <&L2>;\n" ">>> + };\n" ">>> +\n" - ">>> + cpu at 3 {\n" + ">>> + cpu@3 {\n" ">>> + compatible = \"arm,cortex-a9\";\n" ">>> + device_type = \"cpu\";\n" ">>> + reg = <3>;\n" @@ -110,7 +126,7 @@ ">>> reg = <0x1000 0x1000>, <0x100 0x100>;\n" ">>> };\n" ">>>\n" - ">>> + sysctrl: system-controller at 802000 {\n" + ">>> + sysctrl: system-controller@802000 {\n" ">>> + compatible = \"hisilicon,sysctrl\";\n" ">>> + reg = <0x802000 0x1000>;\n" ">>> + #address-cells = <1>;\n" @@ -121,14 +137,14 @@ ">>> + reboot-offset = <0x4>;\n" ">>> + };\n" ">>> +\n" - ">>> dual_timer0: dual_timer at 800000 {\n" + ">>> dual_timer0: dual_timer@800000 {\n" ">>> compatible = \"arm,sp804\", \"arm,primecell\";\n" ">>> reg = <0x800000 0x1000>;\n" ">>> @@ -115,6 +147,12 @@\n" ">>> status = \"disabled\";\n" ">>> };\n" ">>>\n" - ">>> + timer5: timer at 600 {\n" + ">>> + timer5: timer@600 {\n" ">>> + compatible = \"arm,cortex-a9-twd-timer\";\n" ">>> + reg = <0x600 0x20>;\n" ">>> + interrupts = <1 13 0xf01>;\n" @@ -142,6 +158,10 @@ "real clocks are in place? Otherwise it seems twd_get_clock() is going\n" "to fail.\n" "\n" - Kevin + "Kevin\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -59e2b4518289232e6836f976a1c6c7d0b0d28de19421b09277d693a39fb00bc5 +0bc03b61da2b291299093abcd707ab96ac0010c04c927de1bb1ee762068fe673
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