All of lore.kernel.org
 help / color / mirror / Atom feed
From: Kevin Hilman <khilman@deeprootsystems.com>
To: "Cousson, Benoit" <b-cousson@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
	"Petazzoni-XID, Thomas" <t-petazzoni@ti.com>
Subject: Re: [PATCH] omap: prcm: switch to a chained IRQ handler mechanism
Date: Wed, 17 Nov 2010 08:16:01 -0800	[thread overview]
Message-ID: <87tyjg6i4e.fsf@deeprootsystems.com> (raw)
In-Reply-To: <4CE3D96A.5010004@ti.com> (Benoit Cousson's message of "Wed, 17 Nov 2010 14:32:26 +0100")

"Cousson, Benoit" <b-cousson@ti.com> writes:

[...]

>> +#define OMAP_MPUIO_IRQ_END	(IH_MPUIO_BASE + 16)
>> +
>> +/* 32 IRQs for the PRCM */
>> +#define OMAP_PRCM_IRQ_BASE                 (OMAP_MPUIO_IRQ_END)
>> +#define INT_34XX_PRCM_WKUP_EN              (OMAP_PRCM_IRQ_BASE +  0)
>> +#define INT_34XX_PRCM_EVGENON_EN           (OMAP_PRCM_IRQ_BASE +  2)
>> +#define INT_34XX_PRCM_EVGENOFF_EN          (OMAP_PRCM_IRQ_BASE +  3)
>> +#define INT_34XX_PRCM_TRANSITION_EN        (OMAP_PRCM_IRQ_BASE +  4)
>> +#define INT_34XX_PRCM_CORE_DPLL_RECAL_EN   (OMAP_PRCM_IRQ_BASE +  5)
>> +#define INT_34XX_PRCM_PERIPH_DPLL_RECAL_EN (OMAP_PRCM_IRQ_BASE +  6)
>> +#define INT_34XX_PRCM_MPU_DPLL_RECAL_EN_EN (OMAP_PRCM_IRQ_BASE +  7)
>> +#define INT_34XX_PRCM_IVA2_DPLL_RECAL_EN   (OMAP_PRCM_IRQ_BASE +  8)
>> +#define INT_34XX_PRCM_IO_EN                (OMAP_PRCM_IRQ_BASE +  9)
>> +#define INT_34XX_PRCM_VP1_OPPCHANGEDONE_EN (OMAP_PRCM_IRQ_BASE + 10)
>> +#define INT_34XX_PRCM_VP1_MINVDD_EN        (OMAP_PRCM_IRQ_BASE + 11)
>> +#define INT_34XX_PRCM_VP1_MAXVDD_EN        (OMAP_PRCM_IRQ_BASE + 12)
>> +#define INT_34XX_PRCM_VP1_NOSMPSACK_EN     (OMAP_PRCM_IRQ_BASE + 13)
>> +#define INT_34XX_PRCM_VP1_EQVALUE_EN       (OMAP_PRCM_IRQ_BASE + 14)
>> +#define INT_34XX_PRCM_VP1_TRANXDONE_EN     (OMAP_PRCM_IRQ_BASE + 15)
>> +#define INT_34XX_PRCM_VP2_OPPCHANGEDONE_EN (OMAP_PRCM_IRQ_BASE + 16)
>> +#define INT_34XX_PRCM_VP2_MINVDD_EN        (OMAP_PRCM_IRQ_BASE + 17)
>> +#define INT_34XX_PRCM_VP2_MAXVDD_EN        (OMAP_PRCM_IRQ_BASE + 18)
>> +#define INT_34XX_PRCM_VP2_NOSMPSACK_EN     (OMAP_PRCM_IRQ_BASE + 19)
>> +#define INT_34XX_PRCM_VP2_EQVALUE_EN       (OMAP_PRCM_IRQ_BASE + 20)
>> +#define INT_34XX_PRCM_VP2_TRANXDONE_EN     (OMAP_PRCM_IRQ_BASE + 21)
>> +#define INT_34XX_PRCM_VC_SAERR_EN          (OMAP_PRCM_IRQ_BASE + 22)
>> +#define INT_34XX_PRCM_VC_RAERR_EN          (OMAP_PRCM_IRQ_BASE + 23)
>> +#define INT_34XX_PRCM_VC_TIMEOUT_ERR_EN    (OMAP_PRCM_IRQ_BASE + 24)
>> +#define INT_34XX_PRCM_SND_PERIPH_RECAL_EN  (OMAP_PRCM_IRQ_BASE + 25)
>> +#define INT_36XX_PRCM_ABB_LDO_TRANXDONE_EN (OMAP_PRCM_IRQ_BASE + 26)
>> +#define INT_36XX_PRCM_VC_VP1_ACK_EN        (OMAP_PRCM_IRQ_BASE + 27)
>> +#define INT_36XX_PRCM_VC_BYPASS_ACK_EN     (OMAP_PRCM_IRQ_BASE + 28)
>> +#define OMAP_PRCM_NR_IRQS                  32
>> +#define OMAP_PRCM_IRQ_END                  (OMAP_PRCM_IRQ_BASE + \
>> +					    OMAP_PRCM_NR_IRQS)
>
> We are in the process of getting rid of all the IRQ defines thanks to
> hwmod. Maybe we should consider moving that to hwmod data? I'm not
> sure exactly how we will handle that case but it might worth
> considering it.

What hwmod would these be attached to?  I guess that would mean creating
a hwmod for the PRM, and attatching the IRQs there?

Taht being said, is hwmod the right place for these "virtual" IRQs?
These IRQs are internal to that IP, and not really integration IRQs.

> If we do want to make that code OMAP generic, we will probably have to.
>
> That being said, that patch is already a good improvement compared to
> the previous solution. So maybe we should do that in several phases.
>
> Kevin,
> Any thoughts on that?

I think this needs some more discussion, and probably a separate phase
since we don't currently have hwmods for PRM or CM, at least on OMAP3.

Kevin

  reply	other threads:[~2010-11-17 16:16 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-11-17 12:16 [PATCH] omap: prcm: switch to a chained IRQ handler mechanism Thomas Petazzoni
2010-11-17 13:32 ` Cousson, Benoit
2010-11-17 16:16   ` Kevin Hilman [this message]
2010-11-17 16:38     ` Cousson, Benoit
  -- strict thread matches above, loose matches on Subject: below --
2010-12-17 11:21 Thomas Petazzoni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87tyjg6i4e.fsf@deeprootsystems.com \
    --to=khilman@deeprootsystems.com \
    --cc=b-cousson@ti.com \
    --cc=linux-omap@vger.kernel.org \
    --cc=t-petazzoni@ti.com \
    --cc=thomas.petazzoni@free-electrons.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.