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[91.219.240.8]) by smtp.gmail.com with ESMTPSA id j11-20020a05600c190b00b0040b4c26d2dasm2536292wmq.32.2023.11.30.08.37.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 08:37:14 -0800 (PST) From: Vitaly Kuznetsov To: kernel test robot Cc: oe-kbuild-all@lists.linux.dev, linux-kernel@vger.kernel.org, Paolo Bonzini , Sean Christopherson , kvm@vger.kernel.org Subject: Re: arch/x86/kvm/vmx/hyperv.h:79:30: sparse: sparse: cast truncates bits from constant value (1b009b becomes 9b) In-Reply-To: <202311302231.sinLrAig-lkp@intel.com> References: <202311302231.sinLrAig-lkp@intel.com> Date: Thu, 30 Nov 2023 17:37:13 +0100 Message-ID: <87v89jmc3q.fsf@redhat.com> Precedence: bulk X-Mailing-List: oe-kbuild-all@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain kernel test robot writes: > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master > head: 3b47bc037bd44f142ac09848e8d3ecccc726be99 > commit: a789aeba419647c44d7e7320de20fea037c211d0 KVM: VMX: Rename "vmx/evmcs.{ch}" to "vmx/hyperv.{ch}" > date: 1 year ago > config: x86_64-randconfig-123-20231130 (https://download.01.org/0day-ci/archive/20231130/202311302231.sinLrAig-lkp@intel.com/config) > compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07) > reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231130/202311302231.sinLrAig-lkp@intel.com/reproduce) > > If you fix the issue in a separate patch/commit (i.e. not just a new version of > the same patch/commit), kindly add following tags > | Reported-by: kernel test robot > | Closes: https://lore.kernel.org/oe-kbuild-all/202311302231.sinLrAig-lkp@intel.com/ > > sparse warnings: (new ones prefixed by >>) > arch/x86/kvm/vmx/hyperv.h:79:30: sparse: sparse: cast truncates bits from constant value (a000a becomes a) This is what ROL16() macro does but the thing is: we actually want to truncate bits by doing an explicit (u16) cast. We can probably replace this with '& 0xffff': #define ROL16(val, n) ((((u16)(val) << (n)) | ((u16)(val) >> (16 - (n)))) & 0xffff) but honestly I don't see much point... -- Vitaly