From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>,
stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC
Date: Fri, 26 Aug 2022 13:03:05 -0700 [thread overview]
Message-ID: <87v8qen56u.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20220826174434.157513-1-rodrigo.vivi@intel.com>
On Fri, 26 Aug 2022 10:44:34 -0700, Rodrigo Vivi wrote:
>
> Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled")
> Cc: <stable@vger.kernel.org> # v5.15+
> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_llc.c | 24 ++++++++++++++++--------
> 1 file changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> index 14fe65812e42..2677d62573d9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> @@ -49,13 +49,28 @@ static unsigned int cpu_max_MHz(void)
> static bool get_ia_constants(struct intel_llc *llc,
> struct ia_constants *consts)
> {
> + struct intel_guc_slpc *slpc = &llc_to_gt(llc)->uc.guc.slpc;
> struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
> struct intel_rps *rps = &llc_to_gt(llc)->rps;
>
> if (!HAS_LLC(i915) || IS_DGFX(i915))
> return false;
>
> - if (rps->max_freq <= rps->min_freq)
> + if (intel_uc_uses_guc_slpc(&llc_to_gt(llc)->uc)) {
> + consts->min_gpu_freq = slpc->min_freq;
> + consts->max_gpu_freq = slpc->rp0_freq;
> + } else {
> + consts->min_gpu_freq = rps->min_freq;
> + consts->max_gpu_freq = rps->max_freq;
> + }
> +
> + if (GRAPHICS_VER(i915) >= 9) {
> + /* Convert GT frequency to 50 HZ units */
> + consts->min_gpu_freq /= GEN9_FREQ_SCALER;
> + consts->max_gpu_freq /= GEN9_FREQ_SCALER;
> + }
> +
> + if (consts->max_gpu_freq <= consts->min_gpu_freq)
> return false;
Hi Rodrigo, sorry, I missed this check previously too and the code is now
equivalent to the previous code.
But now, looking at the code in gen6_update_ring_freq, I am wondering if we
should return true in this case (i.e. remove the check) and we had a bug in
the previous code? Because if we return false, gen6_update_ring_freq will
skip the PCODE programming if 'max_gpu_freq == min_gpu_freq', but why
should we skip the PCODE programming if 'max_gpu_freq == min_gpu_freq'? The
case of 'max_gpu_freq < min_gpu_freq' is fine since the loop in
gen6_update_ring_freq is not entered in that case.
Thanks.
--
Ashutosh
WARNING: multiple messages have this Message-ID (diff)
From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>, <stable@vger.kernel.org>,
Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Subject: Re: [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC
Date: Fri, 26 Aug 2022 13:03:05 -0700 [thread overview]
Message-ID: <87v8qen56u.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <20220826174434.157513-1-rodrigo.vivi@intel.com>
On Fri, 26 Aug 2022 10:44:34 -0700, Rodrigo Vivi wrote:
>
> Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled")
> Cc: <stable@vger.kernel.org> # v5.15+
> Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
> Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_llc.c | 24 ++++++++++++++++--------
> 1 file changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
> index 14fe65812e42..2677d62573d9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_llc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_llc.c
> @@ -49,13 +49,28 @@ static unsigned int cpu_max_MHz(void)
> static bool get_ia_constants(struct intel_llc *llc,
> struct ia_constants *consts)
> {
> + struct intel_guc_slpc *slpc = &llc_to_gt(llc)->uc.guc.slpc;
> struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
> struct intel_rps *rps = &llc_to_gt(llc)->rps;
>
> if (!HAS_LLC(i915) || IS_DGFX(i915))
> return false;
>
> - if (rps->max_freq <= rps->min_freq)
> + if (intel_uc_uses_guc_slpc(&llc_to_gt(llc)->uc)) {
> + consts->min_gpu_freq = slpc->min_freq;
> + consts->max_gpu_freq = slpc->rp0_freq;
> + } else {
> + consts->min_gpu_freq = rps->min_freq;
> + consts->max_gpu_freq = rps->max_freq;
> + }
> +
> + if (GRAPHICS_VER(i915) >= 9) {
> + /* Convert GT frequency to 50 HZ units */
> + consts->min_gpu_freq /= GEN9_FREQ_SCALER;
> + consts->max_gpu_freq /= GEN9_FREQ_SCALER;
> + }
> +
> + if (consts->max_gpu_freq <= consts->min_gpu_freq)
> return false;
Hi Rodrigo, sorry, I missed this check previously too and the code is now
equivalent to the previous code.
But now, looking at the code in gen6_update_ring_freq, I am wondering if we
should return true in this case (i.e. remove the check) and we had a bug in
the previous code? Because if we return false, gen6_update_ring_freq will
skip the PCODE programming if 'max_gpu_freq == min_gpu_freq', but why
should we skip the PCODE programming if 'max_gpu_freq == min_gpu_freq'? The
case of 'max_gpu_freq < min_gpu_freq' is fine since the loop in
gen6_update_ring_freq is not entered in that case.
Thanks.
--
Ashutosh
next prev parent reply other threads:[~2022-08-26 20:03 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-25 22:23 [Intel-gfx] [PATCH] drm/i915/slpc: Set rps' min and max frequencies even with SLPC Rodrigo Vivi
2022-08-25 22:42 ` Rodrigo Vivi
2022-08-25 23:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2022-08-25 23:59 ` [Intel-gfx] [PATCH] " Dixit, Ashutosh
2022-08-26 9:28 ` Vivi, Rodrigo
2022-08-26 10:13 ` [Intel-gfx] [PATCH] drm/i915/slpc: Fix PCODE IA Freq requests when using SLPC Rodrigo Vivi
2022-08-26 10:13 ` Rodrigo Vivi
2022-08-26 13:13 ` [Intel-gfx] " Dixit, Ashutosh
2022-08-26 13:13 ` Dixit, Ashutosh
2022-08-26 17:44 ` [Intel-gfx] " Rodrigo Vivi
2022-08-26 17:44 ` Rodrigo Vivi
2022-08-26 20:03 ` Dixit, Ashutosh [this message]
2022-08-26 20:03 ` Dixit, Ashutosh
2022-08-30 15:42 ` [Intel-gfx] " Dixit, Ashutosh
2022-08-30 15:42 ` Dixit, Ashutosh
2022-08-30 19:16 ` [Intel-gfx] [PATCH] drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC Rodrigo Vivi
2022-08-30 19:16 ` Rodrigo Vivi
2022-08-31 0:45 ` [Intel-gfx] " Dixit, Ashutosh
2022-08-31 0:45 ` Dixit, Ashutosh
2022-08-31 19:35 ` [Intel-gfx] " Vivi, Rodrigo
2022-08-31 19:35 ` Vivi, Rodrigo
2022-08-31 21:45 ` [Intel-gfx] " Rodrigo Vivi
2022-08-31 21:45 ` Rodrigo Vivi
2022-08-31 22:17 ` [Intel-gfx] " Dixit, Ashutosh
2022-08-31 22:17 ` Dixit, Ashutosh
2022-09-01 16:53 ` [Intel-gfx] " Rodrigo Vivi
2022-09-01 16:53 ` Rodrigo Vivi
2022-08-26 0:53 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev2) Patchwork
2022-08-26 11:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev4) Patchwork
2022-08-26 18:43 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev5) Patchwork
2022-08-30 12:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev4) Patchwork
2022-08-30 19:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev6) Patchwork
2022-08-31 15:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-08-31 22:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/slpc: Set rps' min and max frequencies even with SLPC. (rev7) Patchwork
2022-09-01 17:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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