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Fri, 13 Aug 2021 00:39:44 -0700 (PDT) Received: from localhost ([2001:4479:e200:df00:e80c:91ad:1614:aeef]) by smtp.gmail.com with ESMTPSA id i13sm1137323pfr.79.2021.08.13.00.39.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Aug 2021 00:39:44 -0700 (PDT) From: Daniel Axtens To: "Aneesh Kumar K.V" , linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au Subject: Re: [PATCH v2 1/2] powerpc/book3s64/radix: make tlb_single_page_flush_ceiling a debugfs entry In-Reply-To: <20210812132831.233794-1-aneesh.kumar@linux.ibm.com> References: <20210812132831.233794-1-aneesh.kumar@linux.ibm.com> Date: Fri, 13 Aug 2021 17:39:41 +1000 Message-ID: <87v949eqte.fsf@linkitivity.dja.id.au> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Aneesh Kumar K.V" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" "Aneesh Kumar K.V" writes: > Similar to x86/s390 add a debugfs file to tune tlb_single_page_flush_ceiling. > Also add a debugfs entry for tlb_local_single_page_flush_ceiling. > > Signed-off-by: Aneesh Kumar K.V > --- > Changes from v1: > * switch to debugfs_create_u32 > > arch/powerpc/mm/book3s64/radix_tlb.c | 16 ++++++++++++++-- > 1 file changed, 14 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/mm/book3s64/radix_tlb.c b/arch/powerpc/mm/book3s64/radix_tlb.c > index aefc100d79a7..1fa2bc6a969e 100644 > --- a/arch/powerpc/mm/book3s64/radix_tlb.c > +++ b/arch/powerpc/mm/book3s64/radix_tlb.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include > > #include "internal.h" > > @@ -1106,8 +1107,8 @@ EXPORT_SYMBOL(radix__flush_tlb_kernel_range); > * invalidating a full PID, so it has a far lower threshold to change from > * individual page flushes to full-pid flushes. > */ > -static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33; > -static unsigned long tlb_local_single_page_flush_ceiling __read_mostly = POWER9_TLB_SETS_RADIX * 2; > +static u32 tlb_single_page_flush_ceiling __read_mostly = 33; > +static u32 tlb_local_single_page_flush_ceiling __read_mostly = POWER9_TLB_SETS_RADIX * 2; > > static inline void __radix__flush_tlb_range(struct mm_struct *mm, > unsigned long start, unsigned long end) > @@ -1524,3 +1525,14 @@ void do_h_rpt_invalidate_prt(unsigned long pid, unsigned long lpid, > EXPORT_SYMBOL_GPL(do_h_rpt_invalidate_prt); > > #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ > + > +static int __init create_tlb_single_page_flush_ceiling(void) > +{ > + debugfs_create_u32("tlb_single_page_flush_ceiling", 0600, > + powerpc_debugfs_root, &tlb_single_page_flush_ceiling); > + debugfs_create_u32("tlb_local_single_page_flush_ceiling", 0600, > + powerpc_debugfs_root, &tlb_local_single_page_flush_ceiling); > + return 0; > +} > +late_initcall(create_tlb_single_page_flush_ceiling); This patch seems to do what the commit message says, and it does seem to make sense to have these parameters as tunables. I was briefly concerned that switching from an unsigned long to a u32 might lead to suboptimal code generation in older gcc versions, but it doesn't seem to be a case where a single instruction is going to make a huge impact. I also wondered what the C integer promotion rules would do with a the nr_pages > tlb*flush_ceiling comparisons, but if we are trying to flush more than 4 billion pages we might have other, bigger problems! (Also, if I understand the C integer rules correctly the u32 will get promoted to an unsigned long anyway.) All in all this seems good to me. Reviewed-by: Daniel Axtens Kind regards, Daniel > + > -- > 2.31.1