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Wed, 09 Dec 2020 00:36:57 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id 34sm2057298wrh.78.2020.12.09.00.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Dec 2020 00:36:55 -0800 (PST) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id B26EA1FF7E; Wed, 9 Dec 2020 08:36:54 +0000 (GMT) References: <20201208194839.31305-1-cfontana@suse.de> <20201208194839.31305-2-cfontana@suse.de> User-agent: mu4e 1.5.7; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Claudio Fontana Subject: Re: [RFC v9 01/32] accel/tcg: split CpusAccel into three TCG variants Date: Wed, 09 Dec 2020 08:34:24 +0000 In-reply-to: <20201208194839.31305-2-cfontana@suse.de> Message-ID: <87v9dbfk9l.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x441.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Durrant , Jason Wang , qemu-devel@nongnu.org, Peter Xu , haxm-team@intel.com, Colin Xu , Olaf Hering , Stefano Stabellini , Bruce Rogers , "Emilio G . Cota" , Anthony Perard , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Laurent Vivier , Thomas Huth , Eduardo Habkost , Richard Henderson , Cameron Esfahani , Dario Faggioli , Roman Bolshakov , Sunil Muthuswamy , Marcelo Tosatti , Philippe =?utf-8?Q?Mathieu-Daud?= =?utf-8?Q?=C3=A9?= , Wenchao Wang , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Claudio Fontana writes: > split up the CpusAccel tcg_cpus into three TCG variants: > > tcg_cpus_rr (single threaded, round robin cpus) > tcg_cpus_icount (same as rr, but with instruction counting enabled) > tcg_cpus_mttcg (multi-threaded cpus) > > diff --git a/accel/tcg/tcg-cpus-mttcg.c b/accel/tcg/tcg-cpus-mttcg.c > new file mode 100644 > index 0000000000..dac724fc85 > --- /dev/null > +++ b/accel/tcg/tcg-cpus-mttcg.c > @@ -0,0 +1,117 @@ > + > +/* > + * In the multi-threaded case each vCPU has its own thread. The TLS > + * variable current_cpu can be used deep in the code to find the > + * current CPUState for a given thread. > + */ > + > + > +/* > + * In the multi-threaded case each vCPU has its own thread. The TLS > + * variable current_cpu can be used deep in the code to find the > + * current CPUState for a given thread. > + */ nit: This is overly repetitive - I think we can drop the duplication in the header. If anything the comment should probably be re-formulated at the current_cpu definition in cpus-common. Otherwise nice clean-up ;-) Reviewed-by: Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e