Re: [PATCH v4 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op

From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ramalingam C <ramalingam.c@intel.com>,
	intel-gfx@lists.freedesktop.org, rodrigo.vivi@intel.com,
	ville.syrjala@linux.intel.com
Subject: Re: [PATCH v4 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op
Date: Mon, 14 May 2018 12:19:05 +0300	[thread overview]
Message-ID: <87vabq388m.fsf@intel.com> (raw)
In-Reply-To: <1525873503-5458-2-git-send-email-ramalingam.c@intel.com>

On Wed, 09 May 2018, Ramalingam C <ramalingam.c@intel.com> wrote:
> GMBUS HW supports 511Bytes as Max Bytes per single RD/WR op. Instead of
> enabling the 511Bytes per RD/WR cycle on legacy platforms for no
> absolute ROIs, this change allows the max bytes per op upto 511Bytes
> from Gen9 onwards.
>
> v2:
>   No Change.
> v3:
>   Inline function for max_xfer_size and renaming of the macro.[Jani]
> v4:
>   Extra brackets removed [ville]
>   Commit msg is modified.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h  |  1 +
>  drivers/gpu/drm/i915/intel_i2c.c | 11 +++++++++--
>  2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c08fd4ded688..df998c10c48e 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3025,6 +3025,7 @@ enum i915_power_well_id {
>  #define   GMBUS_CYCLE_STOP	(4<<25)
>  #define   GMBUS_BYTE_COUNT_SHIFT 16
>  #define   GMBUS_BYTE_COUNT_MAX   256U
> +#define   GEN9_GMBUS_BYTE_COUNT_MAX 511U
>  #define   GMBUS_SLAVE_INDEX_SHIFT 8
>  #define   GMBUS_SLAVE_ADDR_SHIFT 1
>  #define   GMBUS_SLAVE_READ	(1<<0)
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> index e6875509bcd9..1c0f6b56b209 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -361,6 +361,13 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
>  	return ret;
>  }
>  
> +static inline
> +unsigned int gmbus_max_xfer_size(struct drm_i915_private *dev_priv)
> +{
> +	return INTEL_GEN(dev_priv) >= 9 ? GEN9_GMBUS_BYTE_COUNT_MAX :
> +	       GMBUS_BYTE_COUNT_MAX;
> +}
> +
>  static int
>  gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv,
>  		      unsigned short addr, u8 *buf, unsigned int len,
> @@ -400,7 +407,7 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
>  	int ret;
>  
>  	do {
> -		len = min(rx_size, GMBUS_BYTE_COUNT_MAX);
> +		len = min(rx_size, gmbus_max_xfer_size(dev_priv));
>  
>  		ret = gmbus_xfer_read_chunk(dev_priv, msg->addr,
>  					    buf, len, gmbus1_index);
> @@ -462,7 +469,7 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
>  	int ret;
>  
>  	do {
> -		len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
> +		len = min(tx_size, gmbus_max_xfer_size(dev_priv));
>  
>  		ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len,
>  					     gmbus1_index);

-- 
Jani Nikula, Intel Open Source Technology Center
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