From: Eric Anholt <eric@anholt.net>
To: dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/vc4: Flush the caches before the bin jobs, as well.
Date: Wed, 17 Jan 2018 13:06:04 -0800 [thread overview]
Message-ID: <87vag0dwlf.fsf@anholt.net> (raw)
In-Reply-To: <20171221221722.23809-1-eric@anholt.net>
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Eric Anholt <eric@anholt.net> writes:
> If the frame samples from a render target that was just written, its
> cache flush during the binning step may have occurred before the
> previous frame's RCL was completed. Flush the texture caches again
> before starting each RCL job to make sure that the sampling of the
> previous RCL's output is correct.
>
> Fixes flickering in the top left of 3DMMES Taiji.
>
> Signed-off-by: Eric Anholt <eric@anholt.net>
> Fixes: ca26d28bbaa3 ("drm/vc4: improve throughput by pipelining binning and rendering jobs")
Whoops, in the subject, this should have been "before the *render* jobs."
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next prev parent reply other threads:[~2018-01-17 21:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-21 22:17 [PATCH] drm/vc4: Flush the caches before the bin jobs, as well Eric Anholt
2017-12-21 22:17 ` Eric Anholt
2018-01-17 21:06 ` Eric Anholt [this message]
2018-01-18 13:45 ` Boris Brezillon
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